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Documentation / devicetree / bindings / arm / atmel-aic.txt




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Based on kernel version 3.16. Page generated on 2014-08-06 21:36 EST.

1	* Advanced Interrupt Controller (AIC)
2	
3	Required properties:
4	- compatible: Should be "atmel,<chip>-aic"
5	  <chip> can be "at91rm9200" or "sama5d3"
6	- interrupt-controller: Identifies the node as an interrupt controller.
7	- interrupt-parent: For single AIC system, it is an empty property.
8	- #interrupt-cells: The number of cells to define the interrupts. It should be 3.
9	  The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).
10	  The second cell is used to specify flags:
11	    bits[3:0] trigger type and level flags:
12	      1 = low-to-high edge triggered.
13	      2 = high-to-low edge triggered.
14	      4 = active high level-sensitive.
15	      8 = active low level-sensitive.
16	      Valid combinations are 1, 2, 3, 4, 8.
17	      Default flag for internal sources should be set to 4 (active high).
18	  The third cell is used to specify the irq priority from 0 (lowest) to 7
19	  (highest).
20	- reg: Should contain AIC registers location and length
21	- atmel,external-irqs: u32 array of external irqs.
22	
23	Examples:
24		/*
25		 * AIC
26		 */
27		aic: interrupt-controller@fffff000 {
28			compatible = "atmel,at91rm9200-aic";
29			interrupt-controller;
30			interrupt-parent;
31			#interrupt-cells = <3>;
32			reg = <0xfffff000 0x200>;
33		};
34	
35		/*
36		 * An interrupt generating device that is wired to an AIC.
37		 */
38		dma: dma-controller@ffffec00 {
39			compatible = "atmel,at91sam9g45-dma";
40			reg = <0xffffec00 0x200>;
41			interrupts = <21 4 5>;
42		};
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