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Documentation / devicetree / bindings / arm / atmel-aic.txt




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Based on kernel version 3.13. Page generated on 2014-01-20 22:00 EST.

1	* Advanced Interrupt Controller (AIC)
2	
3	Required properties:
4	- compatible: Should be "atmel,<chip>-aic"
5	- interrupt-controller: Identifies the node as an interrupt controller.
6	- interrupt-parent: For single AIC system, it is an empty property.
7	- #interrupt-cells: The number of cells to define the interrupts. It should be 3.
8	  The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).
9	  The second cell is used to specify flags:
10	    bits[3:0] trigger type and level flags:
11	      1 = low-to-high edge triggered.
12	      2 = high-to-low edge triggered.
13	      4 = active high level-sensitive.
14	      8 = active low level-sensitive.
15	      Valid combinations are 1, 2, 3, 4, 8.
16	      Default flag for internal sources should be set to 4 (active high).
17	  The third cell is used to specify the irq priority from 0 (lowest) to 7
18	  (highest).
19	- reg: Should contain AIC registers location and length
20	- atmel,external-irqs: u32 array of external irqs.
21	
22	Examples:
23		/*
24		 * AIC
25		 */
26		aic: interrupt-controller@fffff000 {
27			compatible = "atmel,at91rm9200-aic";
28			interrupt-controller;
29			interrupt-parent;
30			#interrupt-cells = <3>;
31			reg = <0xfffff000 0x200>;
32		};
33	
34		/*
35		 * An interrupt generating device that is wired to an AIC.
36		 */
37		dma: dma-controller@ffffec00 {
38			compatible = "atmel,at91sam9g45-dma";
39			reg = <0xffffec00 0x200>;
40			interrupts = <21 4 5>;
41		};
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