Based on kernel version 6.8
. Page generated on 2024-03-11 21:26 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 | * TI - MPU (Main Processor Unit) subsystem The MPU subsystem contain one or several ARM cores depending of the version. The MPU contain CPUs, GIC, L2 cache and a local PRCM. Required properties: - compatible : Should be "ti,omap3-mpu" for OMAP3 Should be "ti,omap4-mpu" for OMAP4 Should be "ti,omap5-mpu" for OMAP5 - ti,hwmods: "mpu" Optional properties: - sram: Phandle to the ocmcram node am335x and am437x only: - pm-sram: Phandles to ocmcram nodes to be used for power management. First should be type 'protect-exec' for the driver to use to copy and run PM functions, second should be regular pool to be used for data region for code. See Documentation/devicetree/bindings/sram/sram.yaml for more details. Examples: - For an OMAP5 SMP system: mpu { compatible = "ti,omap5-mpu"; ti,hwmods = "mpu" }; - For an OMAP4 SMP system: mpu { compatible = "ti,omap4-mpu"; ti,hwmods = "mpu"; }; - For an OMAP3 monocore system: mpu { compatible = "ti,omap3-mpu"; ti,hwmods = "mpu"; }; - For an AM335x system: mpu { compatible = "ti,omap3-mpu"; ti,hwmods = "mpu"; pm-sram = <&pm_sram_code &pm_sram_data>; }; |