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Documentation / devicetree / bindings / c6x / emifa.txt




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Based on kernel version 3.16. Page generated on 2014-08-06 21:36 EST.

1	External Memory Interface
2	-------------------------
3	
4	The emifa node describes a simple external bus controller found on some C6X
5	SoCs. This interface provides external busses with a number of chip selects.
6	
7	Required properties:
8	
9	- compatible: must be "ti,c64x+emifa", "simple-bus"
10	- reg: register area base and size
11	- #address-cells: must be 2 (chip-select + offset)
12	- #size-cells: must be 1
13	- ranges: mapping from EMIFA space to parent space
14	
15	
16	Optional properties:
17	
18	- ti,dscr-dev-enable: Device ID if EMIF is enabled/disabled from DSCR
19	
20	- ti,emifa-burst-priority:
21	      Number of memory transfers after which the EMIF will elevate the priority
22	      of the oldest command in the command FIFO. Setting this field to 255
23	      disables this feature, thereby allowing old commands to stay in the FIFO
24	      indefinitely.
25	
26	- ti,emifa-ce-config:
27	      Configuration values for each of the supported chip selects.
28	
29	Example:
30	
31		emifa@70000000 {
32			compatible = "ti,c64x+emifa", "simple-bus";
33			#address-cells = <2>;
34			#size-cells = <1>;
35			reg = <0x70000000 0x100>;
36			ranges = <0x2 0x0 0xa0000000 0x00000008
37			          0x3 0x0 0xb0000000 0x00400000
38				  0x4 0x0 0xc0000000 0x10000000
39				  0x5 0x0 0xD0000000 0x10000000>;
40	
41			ti,dscr-dev-enable = <13>;
42			ti,emifa-burst-priority = <255>;
43			ti,emifa-ce-config = <0x00240120
44					      0x00240120
45					      0x00240122
46					      0x00240122>;
47	
48			flash@3,0 {
49				#address-cells = <1>;
50				#size-cells = <1>;
51				compatible = "cfi-flash";
52				reg = <0x3 0x0 0x400000>;
53				bank-width = <1>;
54				device-width = <1>;
55				partition@0 {
56					reg = <0x0 0x400000>;
57					label = "NOR";
58				};
59			};
60		};
61	
62	This shows a flash chip attached to chip select 3.
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