Based on kernel version 4.16.1. Page generated on 2018-04-09 11:52 EST.
1 Timer64 2 ------- 3 4 The timer64 node describes C6X event timers. 5 6 Required properties: 7 8 - compatible: must be "ti,c64x+timer64" 9 - reg: base address and size of register region 10 - interrupt-parent: interrupt controller 11 - interrupts: interrupt id 12 13 Optional properties: 14 15 - ti,dscr-dev-enable: Device ID used to enable timer IP through DSCR interface. 16 17 - ti,core-mask: on multi-core SoCs, bitmask of cores allowed to use this timer. 18 19 Example: 20 timer0: timer@25e0000 { 21 compatible = "ti,c64x+timer64"; 22 ti,core-mask = < 0x01 >; 23 reg = <0x25e0000 0x40>; 24 interrupt-parent = <&megamod_pic>; 25 interrupts = < 16 >; 26 };