About Kernel Documentation Linux Kernel Contact Linux Resources Linux Blog

Documentation / devicetree / bindings / clock / altr_socfpga.txt




Custom Search

Based on kernel version 3.13. Page generated on 2014-01-20 22:00 EST.

1	Device Tree Clock bindings for Altera's SoCFPGA platform
2	
3	This binding uses the common clock binding[1].
4	
5	[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
6	
7	Required properties:
8	- compatible : shall be one of the following:
9		"altr,socfpga-pll-clock" - for a PLL clock
10		"altr,socfpga-perip-clock" - The peripheral clock divided from the
11			PLL clock.
12		"altr,socfpga-gate-clk" - Clocks that directly feed peripherals and
13			can get gated.
14	
15	- reg : shall be the control register offset from CLOCK_MANAGER's base for the clock.
16	- clocks : shall be the input parent clock phandle for the clock. This is
17		either an oscillator or a pll output.
18	- #clock-cells : from common clock binding, shall be set to 0.
19	
20	Optional properties:
21	- fixed-divider : If clocks have a fixed divider value, use this property.
22	- clk-gate : For "socfpga-gate-clk", clk-gate contains the gating register
23	        and the bit index.
24	- div-reg : For "socfpga-gate-clk", div-reg contains the divider register, bit shift,
25	        and width.
Hide Line Numbers
About Kernel Documentation Linux Kernel Contact Linux Resources Linux Blog

Information is copyright its respective author. All material is available from the Linux Kernel Source distributed under a GPL License. This page is provided as a free service by mjmwired.net.