Documentation / devicetree / bindings / clock / at91-clock.txt


Based on kernel version 6.4.12. Page generated on 2023-08-29 08:47 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58
Device Tree Clock bindings for arch-at91

This binding uses the common clock binding[1].

[1] Documentation/devicetree/bindings/clock/clock-bindings.txt

Slow Clock controller:

Required properties:
- compatible : shall be one of the following:
	"atmel,at91sam9x5-sckc",
	"atmel,sama5d3-sckc",
	"atmel,sama5d4-sckc" or
	"microchip,sam9x60-sckc":
		at91 SCKC (Slow Clock Controller)
- #clock-cells : shall be 1 for "microchip,sam9x60-sckc" otherwise shall be 0.
- clocks : shall be the input parent clock phandle for the clock.

Optional properties:
- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
  provided on XIN.

For example:
	sckc@fffffe50 {
		compatible = "atmel,at91sam9x5-sckc";
		reg = <0xfffffe50 0x4>;
		clocks = <&slow_xtal>;
		#clock-cells = <0>;
	};

Power Management Controller (PMC):

Required properties:
- compatible : shall be "atmel,<chip>-pmc", "syscon" or
	"microchip,sam9x60-pmc"
	<chip> can be: at91rm9200, at91sam9260, at91sam9261,
	at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15,
	at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5,
	sama5d2, sama5d3 or sama5d4.
- #clock-cells : from common clock binding; shall be set to 2. The first entry
  is the type of the clock (core, system, peripheral or generated) and the
  second entry its index as provided by the datasheet
- clocks : Must contain an entry for each entry in clock-names.
- clock-names: Must include the following entries: "slow_clk", "main_xtal"

Optional properties:
- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
  provided on XIN.

For example:
	pmc: pmc@f0018000 {
		compatible = "atmel,sama5d4-pmc", "syscon";
		reg = <0xf0018000 0x120>;
		interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
		#clock-cells = <2>;
		clocks = <&clk32k>, <&main_xtal>;
		clock-names = "slow_clk", "main_xtal";
	};