Based on kernel version 4.0. Page generated on 2015-04-14 21:20 EST.
1 Broadcom Kona Family Clocks 2 3 This binding is associated with Broadcom SoCs having "Kona" style 4 clock control units (CCUs). A CCU is a clock provider that manages 5 a set of clock signals. Each CCU is represented by a node in the 6 device tree. 7 8 This binding uses the common clock binding: 9 Documentation/devicetree/bindings/clock/clock-bindings.txt 10 11 Required properties: 12 - compatible 13 Shall have a value of the form "brcm,<model>-<which>-ccu", 14 where <model> is a Broadcom SoC model number and <which> is 15 the name of a defined CCU. For example: 16 "brcm,bcm11351-root-ccu" 17 The compatible strings used for each supported SoC family 18 are defined below. 19 - reg 20 Shall define the base and range of the address space 21 containing clock control registers 22 - #clock-cells 23 Shall have value <1>. The permitted clock-specifier values 24 are defined below. 25 - clock-output-names 26 Shall be an ordered list of strings defining the names of 27 the clocks provided by the CCU. 28 29 Device tree example: 30 31 slave_ccu: slave_ccu { 32 compatible = "brcm,bcm11351-slave-ccu"; 33 reg = <0x3e011000 0x0f00>; 34 #clock-cells = <1>; 35 clock-output-names = "uartb", 36 "uartb2", 37 "uartb3", 38 "uartb4"; 39 }; 40 41 ref_crystal_clk: ref_crystal { 42 #clock-cells = <0>; 43 compatible = "fixed-clock"; 44 clock-frequency = <26000000>; 45 }; 46 47 uart@3e002000 { 48 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 49 status = "disabled"; 50 reg = <0x3e002000 0x1000>; 51 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>; 52 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 53 reg-shift = <2>; 54 reg-io-width = <4>; 55 }; 56 57 BCM281XX family 58 --------------- 59 CCU compatible string values for SoCs in the BCM281XX family are: 60 "brcm,bcm11351-root-ccu" 61 "brcm,bcm11351-aon-ccu" 62 "brcm,bcm11351-hub-ccu" 63 "brcm,bcm11351-master-ccu" 64 "brcm,bcm11351-slave-ccu" 65 66 The following table defines the set of CCUs and clock specifiers for 67 BCM281XX family clocks. When a clock consumer references a clocks, 68 its symbolic specifier (rather than its numeric index value) should 69 be used. These specifiers are defined in: 70 "include/dt-bindings/clock/bcm281xx.h" 71 72 CCU Clock Type Index Specifier 73 --- ----- ---- ----- --------- 74 root frac_1m peri 0 BCM281XX_ROOT_CCU_FRAC_1M 75 76 aon hub_timer peri 0 BCM281XX_AON_CCU_HUB_TIMER 77 aon pmu_bsc peri 1 BCM281XX_AON_CCU_PMU_BSC 78 aon pmu_bsc_var peri 2 BCM281XX_AON_CCU_PMU_BSC_VAR 79 80 hub tmon_1m peri 0 BCM281XX_HUB_CCU_TMON_1M 81 82 master sdio1 peri 0 BCM281XX_MASTER_CCU_SDIO1 83 master sdio2 peri 1 BCM281XX_MASTER_CCU_SDIO2 84 master sdio3 peri 2 BCM281XX_MASTER_CCU_SDIO3 85 master sdio4 peri 3 BCM281XX_MASTER_CCU_SDIO4 86 master dmac peri 4 BCM281XX_MASTER_CCU_DMAC 87 master usb_ic peri 5 BCM281XX_MASTER_CCU_USB_IC 88 master hsic2_48m peri 6 BCM281XX_MASTER_CCU_HSIC_48M 89 master hsic2_12m peri 7 BCM281XX_MASTER_CCU_HSIC_12M 90 91 slave uartb peri 0 BCM281XX_SLAVE_CCU_UARTB 92 slave uartb2 peri 1 BCM281XX_SLAVE_CCU_UARTB2 93 slave uartb3 peri 2 BCM281XX_SLAVE_CCU_UARTB3 94 slave uartb4 peri 3 BCM281XX_SLAVE_CCU_UARTB4 95 slave ssp0 peri 4 BCM281XX_SLAVE_CCU_SSP0 96 slave ssp2 peri 5 BCM281XX_SLAVE_CCU_SSP2 97 slave bsc1 peri 6 BCM281XX_SLAVE_CCU_BSC1 98 slave bsc2 peri 7 BCM281XX_SLAVE_CCU_BSC2 99 slave bsc3 peri 8 BCM281XX_SLAVE_CCU_BSC3 100 slave pwm peri 9 BCM281XX_SLAVE_CCU_PWM 101 102 103 BCM21664 family 104 --------------- 105 CCU compatible string values for SoCs in the BCM21664 family are: 106 "brcm,bcm21664-root-ccu" 107 "brcm,bcm21664-aon-ccu" 108 "brcm,bcm21664-master-ccu" 109 "brcm,bcm21664-slave-ccu" 110 111 The following table defines the set of CCUs and clock specifiers for 112 BCM21664 family clocks. When a clock consumer references a clocks, 113 its symbolic specifier (rather than its numeric index value) should 114 be used. These specifiers are defined in: 115 "include/dt-bindings/clock/bcm21664.h" 116 117 CCU Clock Type Index Specifier 118 --- ----- ---- ----- --------- 119 root frac_1m peri 0 BCM21664_ROOT_CCU_FRAC_1M 120 121 aon hub_timer peri 0 BCM21664_AON_CCU_HUB_TIMER 122 123 master sdio1 peri 0 BCM21664_MASTER_CCU_SDIO1 124 master sdio2 peri 1 BCM21664_MASTER_CCU_SDIO2 125 master sdio3 peri 2 BCM21664_MASTER_CCU_SDIO3 126 master sdio4 peri 3 BCM21664_MASTER_CCU_SDIO4 127 master sdio1_sleep peri 4 BCM21664_MASTER_CCU_SDIO1_SLEEP 128 master sdio2_sleep peri 5 BCM21664_MASTER_CCU_SDIO2_SLEEP 129 master sdio3_sleep peri 6 BCM21664_MASTER_CCU_SDIO3_SLEEP 130 master sdio4_sleep peri 7 BCM21664_MASTER_CCU_SDIO4_SLEEP 131 132 slave uartb peri 0 BCM21664_SLAVE_CCU_UARTB 133 slave uartb2 peri 1 BCM21664_SLAVE_CCU_UARTB2 134 slave uartb3 peri 2 BCM21664_SLAVE_CCU_UARTB3 135 slave uartb4 peri 3 BCM21664_SLAVE_CCU_UARTB4 136 slave bsc1 peri 4 BCM21664_SLAVE_CCU_BSC1 137 slave bsc2 peri 5 BCM21664_SLAVE_CCU_BSC2 138 slave bsc3 peri 6 BCM21664_SLAVE_CCU_BSC3 139 slave bsc4 peri 7 BCM21664_SLAVE_CCU_BSC4