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Documentation / devicetree / bindings / clock / imx35-clock.txt




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Based on kernel version 3.16. Page generated on 2014-08-06 21:36 EST.

1	* Clock bindings for Freescale i.MX35
2	
3	Required properties:
4	- compatible: Should be "fsl,imx35-ccm"
5	- reg: Address and length of the register set
6	- interrupts: Should contain CCM interrupt
7	- #clock-cells: Should be <1>
8	
9	The clock consumer should specify the desired clock by having the clock
10	ID in its "clocks" phandle cell.  The following is a full list of i.MX35
11	clocks and IDs.
12	
13		Clock			ID
14		---------------------------
15		ckih			0
16		mpll			1
17		ppll			2
18		mpll_075		3
19		arm			4
20		hsp			5
21		hsp_div			6
22		hsp_sel			7
23		ahb			8
24		ipg			9
25		arm_per_div		10
26		ahb_per_div		11
27		ipg_per			12
28		uart_sel		13
29		uart_div		14
30		esdhc_sel		15
31		esdhc1_div		16
32		esdhc2_div		17
33		esdhc3_div		18
34		spdif_sel		19
35		spdif_div_pre		20
36		spdif_div_post		21
37		ssi_sel			22
38		ssi1_div_pre		23
39		ssi1_div_post		24
40		ssi2_div_pre		25
41		ssi2_div_post		26
42		usb_sel			27
43		usb_div			28
44		nfc_div			29
45		asrc_gate		30
46		pata_gate		31
47		audmux_gate		32
48		can1_gate		33
49		can2_gate		34
50		cspi1_gate		35
51		cspi2_gate		36
52		ect_gate		37
53		edio_gate		38
54		emi_gate		39
55		epit1_gate		40
56		epit2_gate		41
57		esai_gate		42
58		esdhc1_gate		43
59		esdhc2_gate		44
60		esdhc3_gate		45
61		fec_gate		46
62		gpio1_gate		47
63		gpio2_gate		48
64		gpio3_gate		49
65		gpt_gate		50
66		i2c1_gate		51
67		i2c2_gate		52
68		i2c3_gate		53
69		iomuxc_gate		54
70		ipu_gate		55
71		kpp_gate		56
72		mlb_gate		57
73		mshc_gate		58
74		owire_gate		59
75		pwm_gate		60
76		rngc_gate		61
77		rtc_gate		62
78		rtic_gate		63
79		scc_gate		64
80		sdma_gate		65
81		spba_gate		66
82		spdif_gate		67
83		ssi1_gate		68
84		ssi2_gate		69
85		uart1_gate		70
86		uart2_gate		71
87		uart3_gate		72
88		usbotg_gate		73
89		wdog_gate		74
90		max_gate		75
91		admux_gate		76
92		csi_gate		77
93		csi_div			78
94		csi_sel			79
95		iim_gate		80
96		gpu2d_gate		81
97	
98	Examples:
99	
100	clks: ccm@53f80000 {
101		compatible = "fsl,imx35-ccm";
102		reg = <0x53f80000 0x4000>;
103		interrupts = <31>;
104		#clock-cells = <1>;
105	};
106	
107	esdhc1: esdhc@53fb4000 {
108		compatible = "fsl,imx35-esdhc";
109		reg = <0x53fb4000 0x4000>;
110		interrupts = <7>;
111		clocks = <&clks 9>, <&clks 8>, <&clks 43>;
112		clock-names = "ipg", "ahb", "per";
113	};
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