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Documentation / devicetree / bindings / clock / mvebu-gated-clock.txt




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Based on kernel version 4.1. Page generated on 2015-06-28 12:08 EST.

1	* Gated Clock bindings for Marvell EBU SoCs
2	
3	Marvell Armada 370/375/380/385/39x/XP, Dove and Kirkwood allow some
4	peripheral clocks to be gated to save some power. The clock consumer
5	should specify the desired clock by having the clock ID in its
6	"clocks" phandle cell. The clock ID is directly mapped to the
7	corresponding clock gating control bit in HW to ease manual clock
8	lookup in datasheet.
9	
10	The following is a list of provided IDs for Armada 370:
11	ID	Clock	Peripheral
12	-----------------------------------
13	0	Audio	AC97 Cntrl
14	1	pex0_en	PCIe 0 Clock out
15	2	pex1_en	PCIe 1 Clock out
16	3	ge1	Gigabit Ethernet 1
17	4	ge0	Gigabit Ethernet 0
18	5	pex0	PCIe Cntrl 0
19	9	pex1	PCIe Cntrl 1
20	15	sata0	SATA Host 0
21	17	sdio	SDHCI Host
22	25	tdm	Time Division Mplx
23	28	ddr	DDR Cntrl
24	30	sata1	SATA Host 0
25	
26	The following is a list of provided IDs for Armada 375:
27	ID	Clock		Peripheral
28	-----------------------------------
29	2	mu		Management Unit
30	3	pp		Packet Processor
31	4	ptp		PTP
32	5	pex0		PCIe 0 Clock out
33	6	pex1		PCIe 1 Clock out
34	8	audio		Audio Cntrl
35	11	nd_clk		Nand Flash Cntrl
36	14	sata0_link	SATA 0 Link
37	15	sata0_core	SATA 0 Core
38	16	usb3		USB3 Host
39	17	sdio		SDHCI Host
40	18	usb		USB Host
41	19	gop		Gigabit Ethernet MAC
42	20	sata1_link	SATA 1 Link
43	21	sata1_core	SATA 1 Core
44	22	xor0		XOR DMA 0
45	23	xor1		XOR DMA 0
46	24	copro		Coprocessor
47	25	tdm		Time Division Mplx
48	28	crypto0_enc	Cryptographic Unit Port 0 Encryption
49	29	crypto0_core	Cryptographic Unit Port 0 Core
50	30	crypto1_enc	Cryptographic Unit Port 1 Encryption
51	31	crypto1_core	Cryptographic Unit Port 1 Core
52	
53	The following is a list of provided IDs for Armada 380/385:
54	ID	Clock		Peripheral
55	-----------------------------------
56	0	audio		Audio
57	2	ge2		Gigabit Ethernet 2
58	3	ge1		Gigabit Ethernet 1
59	4	ge0		Gigabit Ethernet 0
60	5	pex1		PCIe 1
61	6	pex2		PCIe 2
62	7	pex3		PCIe 3
63	8	pex0		PCIe 0
64	9	usb3h0		USB3 Host 0
65	10	usb3h1		USB3 Host 1
66	11	usb3d		USB3 Device
67	13	bm		Buffer Management
68	14	crypto0z	Cryptographic 0 Z
69	15	sata0		SATA 0
70	16	crypto1z	Cryptographic 1 Z
71	17	sdio		SDIO
72	18	usb2		USB 2
73	21	crypto1		Cryptographic 1
74	22	xor0		XOR 0
75	23	crypto0		Cryptographic 0
76	25	tdm		Time Division Multiplexing
77	28	xor1		XOR 1
78	30	sata1		SATA 1
79	
80	The following is a list of provided IDs for Armada 39x:
81	ID	Clock		Peripheral
82	-----------------------------------
83	5	pex1		PCIe 1
84	6	pex2		PCIe 2
85	7	pex3		PCIe 3
86	8	pex0		PCIe 0
87	9	usb3h0		USB3 Host 0
88	17	sdio		SDIO
89	22	xor0		XOR 0
90	28	xor1		XOR 1
91	
92	The following is a list of provided IDs for Armada XP:
93	ID	Clock	Peripheral
94	-----------------------------------
95	0	audio	Audio Cntrl
96	1	ge3	Gigabit Ethernet 3
97	2	ge2	Gigabit Ethernet 2
98	3	ge1	Gigabit Ethernet 1
99	4	ge0	Gigabit Ethernet 0
100	5	pex0	PCIe Cntrl 0
101	6	pex1	PCIe Cntrl 1
102	7	pex2	PCIe Cntrl 2
103	8	pex3	PCIe Cntrl 3
104	13	bp
105	14	sata0lnk
106	15	sata0	SATA Host 0
107	16	lcd	LCD Cntrl
108	17	sdio	SDHCI Host
109	18	usb0	USB Host 0
110	19	usb1	USB Host 1
111	20	usb2	USB Host 2
112	22	xor0	XOR DMA 0
113	23	crypto	CESA engine
114	25	tdm	Time Division Mplx
115	28	xor1	XOR DMA 1
116	29	sata1lnk
117	30	sata1	SATA Host 0
118	
119	The following is a list of provided IDs for Dove:
120	ID	Clock	Peripheral
121	-----------------------------------
122	0	usb0	USB Host 0
123	1	usb1	USB Host 1
124	2	ge	Gigabit Ethernet
125	3	sata	SATA Host
126	4	pex0	PCIe Cntrl 0
127	5	pex1	PCIe Cntrl 1
128	8	sdio0	SDHCI Host 0
129	9	sdio1	SDHCI Host 1
130	10	nand	NAND Cntrl
131	11	camera	Camera Cntrl
132	12	i2s0	I2S Cntrl 0
133	13	i2s1	I2S Cntrl 1
134	15	crypto	CESA engine
135	21	ac97	AC97 Cntrl
136	22	pdma	Peripheral DMA
137	23	xor0	XOR DMA 0
138	24	xor1	XOR DMA 1
139	30	gephy	Gigabit Ethernel PHY
140	Note: gephy(30) is implemented as a parent clock of ge(2)
141	
142	The following is a list of provided IDs for Kirkwood:
143	ID	Clock	Peripheral
144	-----------------------------------
145	0	ge0	Gigabit Ethernet 0
146	2	pex0	PCIe Cntrl 0
147	3	usb0	USB Host 0
148	4	sdio	SDIO Cntrl
149	5	tsu	Transp. Stream Unit
150	6	dunit	SDRAM Cntrl
151	7	runit	Runit
152	8	xor0	XOR DMA 0
153	9	audio	I2S Cntrl 0
154	14	sata0	SATA Host 0
155	15	sata1	SATA Host 1
156	16	xor1	XOR DMA 1
157	17	crypto	CESA engine
158	18	pex1	PCIe Cntrl 1
159	19	ge1	Gigabit Ethernet 1
160	20	tdm	Time Division Mplx
161	
162	Required properties:
163	- compatible : shall be one of the following:
164		"marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating
165		"marvell,armada-375-gating-clock" - for Armada 375 SoC clock gating
166		"marvell,armada-380-gating-clock" - for Armada 380/385 SoC clock gating
167		"marvell,armada-390-gating-clock" - for Armada 39x SoC clock gating
168		"marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
169		"marvell,dove-gating-clock" - for Dove SoC clock gating
170		"marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
171	- reg : shall be the register address of the Clock Gating Control register
172	- #clock-cells : from common clock binding; shall be set to 1
173	
174	Optional properties:
175	- clocks : default parent clock phandle (e.g. tclk)
176	
177	Example:
178	
179	gate_clk: clock-gating-control@d0038 {
180		compatible = "marvell,dove-gating-clock";
181		reg = <0xd0038 0x4>;
182		/* default parent clock is tclk */
183		clocks = <&core_clk 0>;
184		#clock-cells = <1>;
185	};
186	
187	sdio0: sdio@92000 {
188		compatible = "marvell,dove-sdhci";
189		/* get clk gate bit 8 (sdio0) */
190		clocks = <&gate_clk 8>;
191	};
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