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Documentation / devicetree / bindings / clock / nvidia,tegra20-car.txt




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Based on kernel version 3.13. Page generated on 2014-01-20 22:00 EST.

1	NVIDIA Tegra20 Clock And Reset Controller
2	
3	This binding uses the common clock binding:
4	Documentation/devicetree/bindings/clock/clock-bindings.txt
5	
6	The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
7	for muxing and gating Tegra's clocks, and setting their rates.
8	
9	Required properties :
10	- compatible : Should be "nvidia,tegra20-car"
11	- reg : Should contain CAR registers location and length
12	- clocks : Should contain phandle and clock specifiers for two clocks:
13	  the 32 KHz "32k_in", and the board-specific oscillator "osc".
14	- #clock-cells : Should be 1.
15	  In clock consumers, this cell represents the clock ID exposed by the
16	  CAR. The assignments may be found in header file
17	  <dt-bindings/clock/tegra20-car.h>.
18	
19	Example SoC include file:
20	
21	/ {
22		tegra_car: clock {
23			compatible = "nvidia,tegra20-car";
24			reg = <0x60006000 0x1000>;
25			#clock-cells = <1>;
26		};
27	
28		usb@c5004000 {
29			clocks = <&tegra_car TEGRA20_CLK_USB2>;
30		};
31	};
32	
33	Example board file:
34	
35	/ {
36		clocks {
37			compatible = "simple-bus";
38			#address-cells = <1>;
39			#size-cells = <0>;
40	
41			osc: clock@0 {
42				compatible = "fixed-clock";
43				reg = <0>;
44				#clock-cells = <0>;
45				clock-frequency = <12000000>;
46			};
47	
48			clk_32k: clock@1 {
49				compatible = "fixed-clock";
50				reg = <1>;
51				#clock-cells = <0>;
52				clock-frequency = <32768>;
53			};
54		};
55	
56		&tegra_car {
57			clocks = <&clk_32k> <&osc>;
58		};
59	};
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