Based on kernel version 5.18
. Page generated on 2022-05-23 11:18 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 | * Renesas H8/300 divider clock Required Properties: - compatible: Must be "renesas,h8300-div-clock" - clocks: Reference to the parent clocks ("extal1" and "extal2") - #clock-cells: Must be 1 - reg: Base address and length of the divide rate selector - renesas,width: bit width of selector Example ------- cclk: cclk { compatible = "renesas,h8300-div-clock"; clocks = <&xclk>; #clock-cells = <0>; reg = <0xfee01b 2>; renesas,width = <2>; }; |