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Documentation / devicetree / bindings / crypto / picochip-spacc.txt




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Based on kernel version 3.16. Page generated on 2014-08-06 21:36 EST.

1	Picochip picoXcell SPAcc (Security Protocol Accelerator) bindings
2	
3	Picochip picoXcell devices contain crypto offload engines that may be used for
4	IPSEC and femtocell layer 2 ciphering.
5	
6	Required properties:
7	  - compatible : "picochip,spacc-ipsec" for the IPSEC offload engine
8	    "picochip,spacc-l2" for the femtocell layer 2 ciphering engine.
9	  - reg : Offset and length of the register set for this device
10	  - interrupt-parent : The interrupt controller that controls the SPAcc
11	    interrupt.
12	  - interrupts : The interrupt line from the SPAcc.
13	  - ref-clock : The input clock that drives the SPAcc.
14	
15	Example SPAcc node:
16	
17	spacc@10000 {
18		compatible = "picochip,spacc-ipsec";
19		reg = <0x100000 0x10000>;
20		interrupt-parent = <&vic0>;
21		interrupts = <24>;
22		ref-clock = <&ipsec_clk>, "ref";
23	};
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