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Documentation / devicetree / bindings / i2c / cavium-i2c.txt


Based on kernel version 3.7. Page generated on 2012-12-12 10:00 EST.

1	* Two Wire Serial Interface (TWSI) / I2C
2	
3	- compatible: "cavium,octeon-3860-twsi"
4	
5	  Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
6	
7	- reg: The base address of the TWSI/I2C bus controller register bank.
8	
9	- #address-cells: Must be <1>.
10	
11	- #size-cells: Must be <0>.  I2C addresses have no size component.
12	
13	- interrupts: A single interrupt specifier.
14	
15	- clock-frequency: The I2C bus clock rate in Hz.
16	
17	Example:
18		twsi0: i2c@1180000001000 {
19			#address-cells = <1>;
20			#size-cells = <0>;
21			compatible = "cavium,octeon-3860-twsi";
22			reg = <0x11800 0x00001000 0x0 0x200>;
23			interrupts = <0 45>;
24			clock-frequency = <100000>;
25	
26			rtc@68 {
27				compatible = "dallas,ds1337";
28				reg = <0x68>;
29			};
30			tmp@4c {
31				compatible = "ti,tmp421";
32				reg = <0x4c>;
33			};
34		};
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