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Documentation / devicetree / bindings / interrupt-controller / renesas,intc-irqpin.txt




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Based on kernel version 4.3. Page generated on 2015-11-02 12:45 EST.

1	DT bindings for the R-/SH-Mobile irqpin controller
2	
3	Required properties:
4	
5	- compatible: has to be "renesas,intc-irqpin-<soctype>", "renesas,intc-irqpin"
6	  as fallback.
7	  Examples with soctypes are:
8	    - "renesas,intc-irqpin-r8a7740" (R-Mobile A1)
9	    - "renesas,intc-irqpin-r8a7778" (R-Car M1A)
10	    - "renesas,intc-irqpin-r8a7779" (R-Car H1)
11	    - "renesas,intc-irqpin-sh73a0" (SH-Mobile AG5)
12	
13	- reg: Base address and length of each register bank used by the external
14	  IRQ pins driven by the interrupt controller hardware module. The base
15	  addresses, length and number of required register banks varies with soctype.
16	- interrupt-controller: Identifies the node as an interrupt controller.
17	- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
18	  interrupts.txt in this directory.
19	- interrupts: Must contain a list of interrupt specifiers. For each interrupt
20	  provided by this irqpin controller instance, there must be one entry,
21	  referring to the corresponding parent interrupt.
22	
23	Optional properties:
24	
25	- any properties, listed in interrupts.txt, and any standard resource allocation
26	  properties
27	- sense-bitfield-width: width of a single sense bitfield in the SENSE register,
28	  if different from the default 4 bits
29	- control-parent: disable and enable interrupts on the parent interrupt
30	  controller, needed for some broken implementations
31	- clocks: Must contain a reference to the functional clock.  This property is
32	  mandatory if the hardware implements a controllable functional clock for
33	  the irqpin controller instance.
34	- power-domains: Must contain a reference to the power domain. This property is
35	  mandatory if the irqpin controller instance is part of a controllable power
36	  domain.
37	
38	
39	Example
40	-------
41	
42		irqpin1: interrupt-controller@e6900004 {
43			compatible = "renesas,intc-irqpin-r8a7740",
44				     "renesas,intc-irqpin";
45			#interrupt-cells = <2>;
46			interrupt-controller;
47			reg = <0xe6900004 4>,
48				<0xe6900014 4>,
49				<0xe6900024 1>,
50				<0xe6900044 1>,
51				<0xe6900064 1>;
52			interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
53				      0 149 IRQ_TYPE_LEVEL_HIGH
54				      0 149 IRQ_TYPE_LEVEL_HIGH
55				      0 149 IRQ_TYPE_LEVEL_HIGH
56				      0 149 IRQ_TYPE_LEVEL_HIGH
57				      0 149 IRQ_TYPE_LEVEL_HIGH
58				      0 149 IRQ_TYPE_LEVEL_HIGH
59				      0 149 IRQ_TYPE_LEVEL_HIGH>;
60			clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
61			power-domains = <&pd_a4s>;
62		};
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