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Documentation / devicetree / bindings / interrupt-controller / renesas,intc-irqpin.txt




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Based on kernel version 4.0. Page generated on 2015-04-14 21:21 EST.

1	DT bindings for the R-/SH-Mobile irqpin controller
2	
3	Required properties:
4	
5	- compatible: has to be "renesas,intc-irqpin-<soctype>", "renesas,intc-irqpin"
6	  as fallback.
7	  Examples with soctypes are:
8	    - "renesas,intc-irqpin-r8a7740" (R-Mobile A1)
9	    - "renesas,intc-irqpin-r8a7778" (R-Car M1A)
10	    - "renesas,intc-irqpin-r8a7779" (R-Car H1)
11	    - "renesas,intc-irqpin-sh73a0" (SH-Mobile AG5)
12	
13	- reg: Base address and length of each register bank used by the external
14	  IRQ pins driven by the interrupt controller hardware module. The base
15	  addresses, length and number of required register banks varies with soctype.
16	
17	- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
18	  interrupts.txt in this directory
19	
20	Optional properties:
21	
22	- any properties, listed in interrupts.txt, and any standard resource allocation
23	  properties
24	- sense-bitfield-width: width of a single sense bitfield in the SENSE register,
25	  if different from the default 4 bits
26	- control-parent: disable and enable interrupts on the parent interrupt
27	  controller, needed for some broken implementations
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