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Documentation / devicetree / bindings / mmc / arasan,sdhci.txt




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Based on kernel version 4.7.2. Page generated on 2016-08-22 22:42 EST.

1	Device Tree Bindings for the Arasan SDHCI Controller
2	
3	  The bindings follow the mmc[1], clock[2], interrupt[3] and phy[4] bindings.
4	  Only deviations are documented here.
5	
6	  [1] Documentation/devicetree/bindings/mmc/mmc.txt
7	  [2] Documentation/devicetree/bindings/clock/clock-bindings.txt
8	  [3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
9	  [4] Documentation/devicetree/bindings/phy/phy-bindings.txt
10	
11	Required Properties:
12	  - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a' or
13	                'arasan,sdhci-4.9a' or 'arasan,sdhci-5.1'
14	  - reg: From mmc bindings: Register location and length.
15	  - clocks: From clock bindings: Handles to clock inputs.
16	  - clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb"
17	  - interrupts: Interrupt specifier
18	  - interrupt-parent: Phandle for the interrupt controller that services
19			      interrupts for this device.
20	
21	Required Properties for "arasan,sdhci-5.1":
22	  - phys: From PHY bindings: Phandle for the Generic PHY for arasan.
23	  - phy-names:  MUST be "phy_arasan".
24	
25	Example:
26		sdhci@e0100000 {
27			compatible = "arasan,sdhci-8.9a";
28			reg = <0xe0100000 0x1000>;
29			clock-names = "clk_xin", "clk_ahb";
30			clocks = <&clkc 21>, <&clkc 32>;
31			interrupt-parent = <&gic>;
32			interrupts = <0 24 4>;
33		} ;
34	
35		sdhci@e2800000 {
36			compatible = "arasan,sdhci-5.1";
37			reg = <0xe2800000 0x1000>;
38			clock-names = "clk_xin", "clk_ahb";
39			clocks = <&cru 8>, <&cru 18>;
40			interrupt-parent = <&gic>;
41			interrupts = <0 24 4>;
42			phys = <&emmc_phy>;
43			phy-names = "phy_arasan";
44		} ;
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