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Documentation / devicetree / bindings / mmc / fsl-esdhc.txt




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Based on kernel version 3.16. Page generated on 2014-08-06 21:37 EST.

1	* Freescale Enhanced Secure Digital Host Controller (eSDHC)
2	
3	The Enhanced Secure Digital Host Controller provides an interface
4	for MMC, SD, and SDIO types of memory cards.
5	
6	This file documents differences between the core properties described
7	by mmc.txt and the properties used by the sdhci-esdhc driver.
8	
9	Required properties:
10	  - interrupt-parent : interrupt source phandle.
11	  - clock-frequency : specifies eSDHC base clock frequency.
12	
13	Optional properties:
14	  - sdhci,wp-inverted : specifies that eSDHC controller reports
15	    inverted write-protect state; New devices should use the generic
16	    "wp-inverted" property.
17	  - sdhci,1-bit-only : specifies that a controller can only handle
18	    1-bit data transfers. New devices should use the generic
19	    "bus-width = <1>" property.
20	  - sdhci,auto-cmd12: specifies that a controller can only handle auto
21	    CMD12.
22	  - voltage-ranges : two cells are required, first cell specifies minimum
23	    slot voltage (mV), second cell specifies maximum slot voltage (mV).
24	    Several ranges could be specified.
25	
26	Example:
27	
28	sdhci@2e000 {
29		compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
30		reg = <0x2e000 0x1000>;
31		interrupts = <42 0x8>;
32		interrupt-parent = <&ipic>;
33		/* Filled in by U-Boot */
34		clock-frequency = <0>;
35		voltage-ranges = <3300 3300>;
36	};
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