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Documentation / devicetree / bindings / mmc / mmci.txt




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Based on kernel version 3.16. Page generated on 2014-08-06 21:37 EST.

1	* ARM PrimeCell MultiMedia Card Interface (MMCI) PL180/1
2	
3	The ARM PrimeCell MMCI PL180 and PL181 provides an interface for
4	reading and writing to MultiMedia and SD cards alike.
5	
6	This file documents differences between the core properties described
7	by mmc.txt and the properties used by the mmci driver. Using "st" as
8	the prefix for a property, indicates support by the ST Micro variant.
9	
10	Required properties:
11	- compatible             : contains "arm,pl18x", "arm,primecell".
12	- vmmc-supply            : phandle to the regulator device tree node, mentioned
13	                           as the VCC/VDD supply in the eMMC/SD specs.
14	
15	Optional properties:
16	- arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides
17	                           the ID provided by the HW
18	- vqmmc-supply           : phandle to the regulator device tree node, mentioned
19	                           as the VCCQ/VDD_IO supply in the eMMC/SD specs.
20	- st,sig-dir-dat0        : bus signal direction pin used for DAT[0].
21	- st,sig-dir-dat2        : bus signal direction pin used for DAT[2].
22	- st,sig-dir-dat31       : bus signal direction pin used for DAT[3] and DAT[1].
23	- st,sig-dir-dat74       : bus signal direction pin used for DAT[4] to DAT[7].
24	- st,sig-dir-cmd         : cmd signal direction pin used for CMD.
25	- st,sig-pin-fbclk       : feedback clock signal pin used.
26	
27	Deprecated properties:
28	- mmc-cap-mmc-highspeed  : indicates whether MMC is high speed capable.
29	- mmc-cap-sd-highspeed   : indicates whether SD is high speed capable.
30	
31	Example:
32	
33	sdi0_per1@80126000 {
34		compatible = "arm,pl18x", "arm,primecell";
35		reg = <0x80126000 0x1000>;
36		interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>;
37	
38		dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */
39		       <&dma 29 0 0x0>; /* Logical - MemToDev */
40		dma-names = "rx", "tx";
41	
42		clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;
43		clock-names = "sdi", "apb_pclk";
44	
45		max-frequency = <100000000>;
46		bus-width = <4>;
47		cap-sd-highspeed;
48		cap-mmc-highspeed;
49		cd-gpios  = <&gpio2 31 0x4>; // 95
50		st,sig-dir-dat0;
51		st,sig-dir-dat2;
52		st,sig-dir-cmd;
53		st,sig-pin-fbclk;
54	
55		vmmc-supply = <&ab8500_ldo_aux3_reg>;
56		vqmmc-supply = <&vmmci>;
57	
58		pinctrl-names = "default", "sleep";
59		pinctrl-0 = <&sdi0_default_mode>;
60		pinctrl-1 = <&sdi0_sleep_mode>;
61	};
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