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Documentation / devicetree / bindings / mmc / sunxi-mmc.txt




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Based on kernel version 3.16. Page generated on 2014-08-06 21:37 EST.

1	* Allwinner sunxi MMC controller
2	
3	The highspeed MMC host controller on Allwinner SoCs provides an interface
4	for MMC, SD and SDIO types of memory cards.
5	
6	Supported maximum speeds are the ones of the eMMC standard 4.5 as well
7	as the speed of SD standard 3.0.
8	Absolute maximum transfer rate is 200MB/s
9	
10	Required properties:
11	 - compatible : "allwinner,sun4i-a10-mmc" or "allwinner,sun5i-a13-mmc"
12	 - reg : mmc controller base registers
13	 - clocks : a list with 2 phandle + clock specifier pairs
14	 - clock-names : must contain "ahb" and "mmc"
15	 - interrupts : mmc controller interrupt
16	
17	Optional properties:
18	 - resets : phandle + reset specifier pair
19	 - reset-names : must contain "ahb"
20	 - for cd, bus-width and additional generic mmc parameters
21	   please refer to mmc.txt within this directory
22	
23	Examples:
24		- Within .dtsi:
25		mmc0: mmc@01c0f000 {
26			compatible = "allwinner,sun5i-a13-mmc";
27			reg = <0x01c0f000 0x1000>;
28			clocks = <&ahb_gates 8>, <&mmc0_clk>;
29			clock-names = "ahb", "mod";
30			interrupts = <0 32 4>;
31			status = "disabled";
32		};
33	
34		- Within dts:
35		mmc0: mmc@01c0f000 {
36			pinctrl-names = "default", "default";
37			pinctrl-0 = <&mmc0_pins_a>;
38			pinctrl-1 = <&mmc0_cd_pin_reference_design>;
39			bus-width = <4>;
40			cd-gpios = <&pio 7 1 0>; /* PH1 */
41			cd-inverted;
42			status = "okay";
43		};
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