Documentation / devicetree / bindings / mtd / gpmi-nand.txt


Based on kernel version 5.8. Page generated on 2020-08-08 17:40 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75
* Freescale General-Purpose Media Interface (GPMI)

The GPMI nand controller provides an interface to control the
NAND flash chips.

Required properties:
  - compatible : should be "fsl,<chip>-gpmi-nand", chip can be:
    * imx23
    * imx28
    * imx6q
    * imx6sx
    * imx7d
  - reg : should contain registers location and length for gpmi and bch.
  - reg-names: Should contain the reg names "gpmi-nand" and "bch"
  - interrupts : BCH interrupt number.
  - interrupt-names : Should be "bch".
  - dmas: DMA specifier, consisting of a phandle to DMA controller node
    and GPMI DMA channel ID.
    Refer to dma.txt and fsl-mxs-dma.txt for details.
  - dma-names: Must be "rx-tx".
  - clocks : clocks phandle and clock specifier corresponding to each clock
    specified in clock-names.
  - clock-names : The "gpmi_io" clock is always required. Which clocks are
    exactly required depends on chip:
    * imx23/imx28 : "gpmi_io"
    * imx6q/sx : "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch"
    * imx7d : "gpmi_io", "gpmi_bch_apb"

Optional properties:
  - nand-on-flash-bbt: boolean to enable on flash bbt option if not
                       present false
  - fsl,use-minimum-ecc: Protect this NAND flash with the minimum ECC
                       strength required. The required ECC strength is
                       automatically discoverable for some flash
                       (e.g., according to the ONFI standard).
                       However, note that if this strength is not
                       discoverable or this property is not enabled,
                       the software may chooses an implementation-defined
                       ECC scheme.
  - fsl,no-blockmark-swap: Don't swap the bad block marker from the OOB
                       area with the byte in the data area but rely on the
                       flash based BBT for identifying bad blocks.
                       NOTE: this is only valid in conjunction with
                             'nand-on-flash-bbt'.
                       WARNING: on i.MX28 blockmark swapping cannot be
                       disabled for the BootROM in the FCB. Thus,
                       partitions written from Linux with this feature
                       turned on may not be accessible by the BootROM
                       code.
  - nand-ecc-strength: integer representing the number of bits to correct
                       per ECC step. Needs to be a multiple of 2.
  - nand-ecc-step-size: integer representing the number of data bytes
                       that are covered by a single ECC step. The driver
                       supports 512 and 1024.

The device tree may optionally contain sub-nodes describing partitions of the
address space. See partition.txt for more detail.

Examples:

gpmi-nand@8000c000 {
	compatible = "fsl,imx28-gpmi-nand";
	#address-cells = <1>;
	#size-cells = <1>;
	reg = <0x8000c000 2000>, <0x8000a000 2000>;
	reg-names = "gpmi-nand", "bch";
	interrupts = <41>;
	interrupt-names = "bch";
	dmas = <&dma_apbh 4>;
	dma-names = "rx-tx";

	partition@0 {
	...
	};
};