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Documentation / devicetree / bindings / pci / 83xx-512x-pci.txt




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Based on kernel version 3.13. Page generated on 2014-01-20 22:01 EST.

1	* Freescale 83xx and 512x PCI bridges
2	
3	Freescale 83xx and 512x SOCs include the same pci bridge core.
4	
5	83xx/512x specific notes:
6	- reg: should contain two address length tuples
7	    The first is for the internal pci bridge registers
8	    The second is for the pci config space access registers
9	
10	Example (MPC8313ERDB)
11		pci0: pci@e0008500 {
12			cell-index = <1>;
13			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
14			interrupt-map = <
15					/* IDSEL 0x0E -mini PCI */
16					 0x7000 0x0 0x0 0x1 &ipic 18 0x8
17					 0x7000 0x0 0x0 0x2 &ipic 18 0x8
18					 0x7000 0x0 0x0 0x3 &ipic 18 0x8
19					 0x7000 0x0 0x0 0x4 &ipic 18 0x8
20	
21					/* IDSEL 0x0F - PCI slot */
22					 0x7800 0x0 0x0 0x1 &ipic 17 0x8
23					 0x7800 0x0 0x0 0x2 &ipic 18 0x8
24					 0x7800 0x0 0x0 0x3 &ipic 17 0x8
25					 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
26			interrupt-parent = <&ipic>;
27			interrupts = <66 0x8>;
28			bus-range = <0x0 0x0>;
29			ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
30				  0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
31				  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
32			clock-frequency = <66666666>;
33			#interrupt-cells = <1>;
34			#size-cells = <2>;
35			#address-cells = <3>;
36			reg = <0xe0008500 0x100		/* internal registers */
37			       0xe0008300 0x8>;		/* config space access registers */
38			compatible = "fsl,mpc8349-pci";
39			device_type = "pci";
40		};
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