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Documentation / devicetree / bindings / pci / versatile.txt


Based on kernel version 4.16.1. Page generated on 2018-04-09 11:52 EST.

1	* ARM Versatile Platform Baseboard PCI interface
2	
3	PCI host controller found on the ARM Versatile PB board's FPGA.
4	
5	Required properties:
6	- compatible: should contain "arm,versatile-pci" to identify the Versatile PCI
7	  controller.
8	- reg: base addresses and lengths of the PCI controller. There must be 3
9	  entries:
10		- Versatile-specific registers
11		- Self Config space
12		- Config space
13	- #address-cells: set to <3>
14	- #size-cells: set to <2>
15	- device_type: set to "pci"
16	- bus-range: set to <0 0xff>
17	- ranges: ranges for the PCI memory and I/O regions
18	- #interrupt-cells: set to <1>
19	- interrupt-map-mask and interrupt-map: standard PCI properties to define
20		the mapping of the PCI interface to interrupt numbers.
21	
22	Example:
23	
24	pci-controller@10001000 {
25		compatible = "arm,versatile-pci";
26		device_type = "pci";
27		reg = <0x10001000 0x1000
28		       0x41000000 0x10000
29		       0x42000000 0x100000>;
30		bus-range = <0 0xff>;
31		#address-cells = <3>;
32		#size-cells = <2>;
33		#interrupt-cells = <1>;
34	
35		ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000   /* downstream I/O */
36			  0x02000000 0 0x50000000 0x50000000 0 0x10000000   /* non-prefetchable memory */
37			  0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
38	
39		interrupt-map-mask = <0x1800 0 0 7>;
40		interrupt-map = <0x1800 0 0 1 &sic 28
41				 0x1800 0 0 2 &sic 29
42				 0x1800 0 0 3 &sic 30
43				 0x1800 0 0 4 &sic 27
44	
45				 0x1000 0 0 1 &sic 27
46				 0x1000 0 0 2 &sic 28
47				 0x1000 0 0 3 &sic 29
48				 0x1000 0 0 4 &sic 30
49	
50				 0x0800 0 0 1 &sic 30
51				 0x0800 0 0 2 &sic 27
52				 0x0800 0 0 3 &sic 28
53				 0x0800 0 0 4 &sic 29
54	
55				 0x0000 0 0 1 &sic 29
56				 0x0000 0 0 2 &sic 30
57				 0x0000 0 0 3 &sic 27
58				 0x0000 0 0 4 &sic 28>;
59	};
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