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Documentation / devicetree / bindings / serial / fsl-lpuart.txt




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Based on kernel version 3.19. Page generated on 2015-02-13 21:19 EST.

1	* Freescale low power universal asynchronous receiver/transmitter (lpuart)
2	
3	Required properties:
4	- compatible :
5	  - "fsl,vf610-lpuart" for lpuart compatible with the one integrated
6	    on Vybrid vf610 SoC with 8-bit register organization
7	  - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
8	    on LS1021A SoC with 32-bit big-endian register organization
9	- reg : Address and length of the register set for the device
10	- interrupts : Should contain uart interrupt
11	- clocks : phandle + clock specifier pairs, one for each entry in clock-names
12	- clock-names : should contain: "ipg" - the uart clock
13	
14	Optional properties:
15	- dmas: A list of two dma specifiers, one for each entry in dma-names.
16	- dma-names: should contain "tx" and "rx".
17	
18	Note: Optional properties for DMA support. Write them both or both not.
19	
20	Example:
21	
22	uart0: serial@40027000 {
23			compatible = "fsl,vf610-lpuart";
24			reg = <0x40027000 0x1000>;
25			interrupts = <0 61 0x00>;
26			clocks = <&clks VF610_CLK_UART0>;
27			clock-names = "ipg";
28			dmas = <&edma0 0 2>,
29				<&edma0 0 3>;
30			dma-names = "rx","tx";
31		};
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