Based on kernel version 6.8
. Page generated on 2024-03-11 21:26 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 | * VIA VT8500 and WonderMedia WM8xxx UART Controller Required properties: - compatible: should be "via,vt8500-uart" (for VIA/WonderMedia chips up to and including WM8850/WM8950), or "wm,wm8880-uart" (for WM8880 and later) - reg: base physical address of the controller and length of memory mapped region. - interrupts: hardware interrupt number - clocks: shall be the input parent clock phandle for the clock. This should be the 24Mhz reference clock. Aliases may be defined to ensure the correct ordering of the uarts. Example: aliases { serial0 = &uart0; }; uart0: serial@d8200000 { compatible = "via,vt8500-uart"; reg = <0xd8200000 0x1040>; interrupts = <32>; clocks = <&clkuart0>; }; |