Based on kernel version 4.16.1. Page generated on 2018-04-09 11:52 EST.
1 Renesas MSIOF spi controller 2 3 Required properties: 4 - compatible : "renesas,msiof-r8a7743" (RZ/G1M) 5 "renesas,msiof-r8a7745" (RZ/G1E) 6 "renesas,msiof-r8a7790" (R-Car H2) 7 "renesas,msiof-r8a7791" (R-Car M2-W) 8 "renesas,msiof-r8a7792" (R-Car V2H) 9 "renesas,msiof-r8a7793" (R-Car M2-N) 10 "renesas,msiof-r8a7794" (R-Car E2) 11 "renesas,msiof-r8a7795" (R-Car H3) 12 "renesas,msiof-r8a7796" (R-Car M3-W) 13 "renesas,msiof-sh73a0" (SH-Mobile AG5) 14 "renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device) 15 "renesas,rcar-gen2-msiof" (generic R-Car Gen2 and RZ/G1 compatible device) 16 "renesas,rcar-gen3-msiof" (generic R-Car Gen3 compatible device) 17 "renesas,sh-msiof" (deprecated) 18 19 When compatible with the generic version, nodes 20 must list the SoC-specific version corresponding 21 to the platform first followed by the generic 22 version. 23 24 - reg : A list of offsets and lengths of the register sets for 25 the device. 26 If only one register set is present, it is to be used 27 by both the CPU and the DMA engine. 28 If two register sets are present, the first is to be 29 used by the CPU, and the second is to be used by the 30 DMA engine. 31 - interrupt-parent : The phandle for the interrupt controller that 32 services interrupts for this device 33 - interrupts : Interrupt specifier 34 - #address-cells : Must be <1> 35 - #size-cells : Must be <0> 36 37 Optional properties: 38 - clocks : Must contain a reference to the functional clock. 39 - num-cs : Total number of chip selects (default is 1). 40 Up to 3 native chip selects are supported: 41 0: MSIOF_SYNC 42 1: MSIOF_SS1 43 2: MSIOF_SS2 44 Hardware limitations related to chip selects: 45 - Native chip selects are always deasserted in 46 between transfers that are part of the same 47 message. Use cs-gpios to work around this. 48 - All slaves using native chip selects must use the 49 same spi-cs-high configuration. Use cs-gpios to 50 work around this. 51 - When using GPIO chip selects, at least one native 52 chip select must be left unused, as it will be 53 driven anyway. 54 - dmas : Must contain a list of two references to DMA 55 specifiers, one for transmission, and one for 56 reception. 57 - dma-names : Must contain a list of two DMA names, "tx" and "rx". 58 - spi-slave : Empty property indicating the SPI controller is used 59 in slave mode. 60 - renesas,dtdl : delay sync signal (setup) in transmit mode. 61 Must contain one of the following values: 62 0 (no bit delay) 63 50 (0.5-clock-cycle delay) 64 100 (1-clock-cycle delay) 65 150 (1.5-clock-cycle delay) 66 200 (2-clock-cycle delay) 67 68 - renesas,syncdl : delay sync signal (hold) in transmit mode. 69 Must contain one of the following values: 70 0 (no bit delay) 71 50 (0.5-clock-cycle delay) 72 100 (1-clock-cycle delay) 73 150 (1.5-clock-cycle delay) 74 200 (2-clock-cycle delay) 75 300 (3-clock-cycle delay) 76 77 Optional properties, deprecated for soctype-specific bindings: 78 - renesas,tx-fifo-size : Overrides the default tx fifo size given in words 79 (default is 64) 80 - renesas,rx-fifo-size : Overrides the default rx fifo size given in words 81 (default is 64) 82 83 Pinctrl properties might be needed, too. See 84 Documentation/devicetree/bindings/pinctrl/renesas,*. 85 86 Example: 87 88 msiof0: spi@e6e20000 { 89 compatible = "renesas,msiof-r8a7791", 90 "renesas,rcar-gen2-msiof"; 91 reg = <0 0xe6e20000 0 0x0064>; 92 interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; 93 clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; 94 dmas = <&dmac0 0x51>, <&dmac0 0x52>; 95 dma-names = "tx", "rx"; 96 #address-cells = <1>; 97 #size-cells = <0>; 98 };