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Documentation / devicetree / bindings / spi / spi-meson.txt


Based on kernel version 4.16.1. Page generated on 2018-04-09 11:52 EST.

1	Amlogic Meson SPI controllers
2	
3	* SPIFC (SPI Flash Controller)
4	
5	The Meson SPIFC is a controller optimized for communication with SPI
6	NOR memories, without DMA support and a 64-byte unified transmit /
7	receive buffer.
8	
9	Required properties:
10	 - compatible: should be "amlogic,meson6-spifc" or "amlogic,meson-gxbb-spifc"
11	 - reg: physical base address and length of the controller registers
12	 - clocks: phandle of the input clock for the baud rate generator
13	 - #address-cells: should be 1
14	 - #size-cells: should be 0
15	
16		spi@c1108c80 {
17			compatible = "amlogic,meson6-spifc";
18			reg = <0xc1108c80 0x80>;
19			clocks = <&clk81>;
20			#address-cells = <1>;
21			#size-cells = <0>;
22		};
23	
24	* SPICC (SPI Communication Controller)
25	
26	The Meson SPICC is generic SPI controller for general purpose Full-Duplex
27	communications with dedicated 16 words RX/TX PIO FIFOs.
28	
29	Required properties:
30	 - compatible: should be:
31		"amlogic,meson-gx-spicc" on Amlogic GX and compatible SoCs.
32		"amlogic,meson-axg-spicc" on Amlogic AXG and compatible SoCs
33	 - reg: physical base address and length of the controller registers
34	 - interrupts: The interrupt specifier
35	 - clock-names: Must contain "core"
36	 - clocks: phandle of the input clock for the baud rate generator
37	 - #address-cells: should be 1
38	 - #size-cells: should be 0
39	
40	Optional properties:
41	 - resets: phandle of the internal reset line
42	
43	See ../spi/spi-bus.txt for more details on SPI bus master and slave devices
44	required and optional properties.
45	
46	Example :
47		spi@c1108d80 {
48			compatible = "amlogic,meson-gx-spicc";
49			reg = <0xc1108d80 0x80>;
50			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
51			clock-names = "core";
52			clocks = <&clk81>;
53			#address-cells = <1>;
54			#size-cells = <0>;
55		};
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