Documentation / devicetree / bindings / spi / spi-xilinx.txt


Based on kernel version 5.13. Page generated on 2021-06-28 07:05 EST.

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Xilinx SPI controller Device Tree Bindings
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Required properties:
- compatible		: Should be "xlnx,xps-spi-2.00.a", "xlnx,xps-spi-2.00.b" or "xlnx,axi-quad-spi-1.00.a"
- reg			: Physical base address and size of SPI registers map.
- interrupts		: Property with a value describing the interrupt
			  number.

Optional properties:
- xlnx,num-ss-bits	 : Number of chip selects used.
- xlnx,num-transfer-bits : Number of bits per transfer. This will be 8 if not specified

Example:
	axi_quad_spi@41e00000 {
			compatible = "xlnx,xps-spi-2.00.a";
			interrupt-parent = <&intc>;
			interrupts = <0 31 1>;
			reg = <0x41e00000 0x10000>;
			xlnx,num-ss-bits = <0x1>;
			xlnx,num-transfer-bits = <32>;
	};