Documentation / devicetree / bindings / thermal / rockchip-thermal.txt


Based on kernel version 5.13. Page generated on 2021-06-28 07:05 EST.

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* Temperature Sensor ADC (TSADC) on rockchip SoCs

Required properties:
- compatible : should be "rockchip,<name>-tsadc"
   "rockchip,px30-tsadc":   found on PX30 SoCs
   "rockchip,rv1108-tsadc": found on RV1108 SoCs
   "rockchip,rk3228-tsadc": found on RK3228 SoCs
   "rockchip,rk3288-tsadc": found on RK3288 SoCs
   "rockchip,rk3328-tsadc": found on RK3328 SoCs
   "rockchip,rk3368-tsadc": found on RK3368 SoCs
   "rockchip,rk3399-tsadc": found on RK3399 SoCs
- reg : physical base address of the controller and length of memory mapped
	region.
- interrupts : The interrupt number to the cpu. The interrupt specifier format
	       depends on the interrupt controller.
- clocks : Must contain an entry for each entry in clock-names.
- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
		the peripheral clock.
- resets : Must contain an entry for each entry in reset-names.
	   See ../reset/reset.txt for details.
- reset-names : Must include the name "tsadc-apb".
- pinctrl-names : The pin control state names;
- pinctrl-0 : The "init" pinctrl state, it will be set before device probe.
- pinctrl-1 : The "default" pinctrl state, it will be set after reset the
	      TSADC controller.
- pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend.
- #thermal-sensor-cells : Should be 1. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description.

Optional properties:
- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
			       1:HIGH.
- rockchip,grf : The phandle of the syscon node for the general register file.

Exiample:
tsadc: tsadc@ff280000 {
	compatible = "rockchip,rk3288-tsadc";
	reg = <0xff280000 0x100>;
	interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
	clock-names = "tsadc", "apb_pclk";
	resets = <&cru SRST_TSADC>;
	reset-names = "tsadc-apb";
	pinctrl-names = "init", "default", "sleep";
	pinctrl-0 = <&otp_gpio>;
	pinctrl-1 = <&otp_out>;
	pinctrl-2 = <&otp_gpio>;
	#thermal-sensor-cells = <1>;
	rockchip,hw-tshut-temp = <95000>;
	rockchip,hw-tshut-mode = <0>;
	rockchip,hw-tshut-polarity = <0>;
};

Example: referring to thermal sensors:
thermal-zones {
	cpu_thermal: cpu_thermal {
		polling-delay-passive = <1000>; /* milliseconds */
		polling-delay = <5000>; /* milliseconds */

		/* sensor	ID */
		thermal-sensors = <&tsadc	1>;

		trips {
			cpu_alert0: cpu_alert {
				temperature = <70000>; /* millicelsius */
				hysteresis = <2000>; /* millicelsius */
				type = "passive";
			};
			cpu_crit: cpu_crit {
				temperature = <90000>; /* millicelsius */
				hysteresis = <2000>; /* millicelsius */
				type = "critical";
			};
		};

		cooling-maps {
			map0 {
				trip = <&cpu_alert0>;
				cooling-device =
				    <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
			};
		};
	};
};