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Documentation / devicetree / bindings / timer / samsung,exynos4210-mct.txt




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Based on kernel version 3.13. Page generated on 2014-01-20 22:02 EST.

1	Samsung's Multi Core Timer (MCT)
2	
3	The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
4	global timer and CPU local timers. The global timer is a 64-bit free running
5	up-counter and can generate 4 interrupts when the counter reaches one of the
6	four preset counter values. The CPU local timers are 32-bit free running
7	down-counters and generate an interrupt when the counter expires. There is
8	one CPU local timer instantiated in MCT for every CPU in the system.
9	
10	Required properties:
11	
12	- compatible: should be "samsung,exynos4210-mct".
13	  (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct.
14	  (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct.
15	
16	- reg: base address of the mct controller and length of the address space
17	  it occupies.
18	
19	- interrupts: the list of interrupts generated by the controller. The following
20	  should be the order of the interrupts specified. The local timer interrupts
21	  should be specified after the four global timer interrupts have been
22	  specified.
23	
24		0: Global Timer Interrupt 0
25		1: Global Timer Interrupt 1
26		2: Global Timer Interrupt 2
27		3: Global Timer Interrupt 3
28		4: Local Timer Interrupt 0
29		5: Local Timer Interrupt 1
30		6: ..
31		7: ..
32		i: Local Timer Interrupt n
33	
34	Example 1: In this example, the system uses only the first global timer
35		   interrupt generated by MCT and the remaining three global timer
36		   interrupts are unused. Two local timer interrupts have been
37		   specified.
38	
39		mct@10050000 {
40			compatible = "samsung,exynos4210-mct";
41			reg = <0x10050000 0x800>;
42			interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>,
43				     <0 42 0>, <0 48 0>;
44		};
45	
46	Example 2: In this example, the MCT global and local timer interrupts are
47		   connected to two separate interrupt controllers. Hence, an
48		   interrupt-map is created to map the interrupts to the respective
49		   interrupt controllers.
50	
51		mct@101C0000 {
52			compatible = "samsung,exynos4210-mct";
53			reg = <0x101C0000 0x800>;
54			interrupt-controller;
55			#interrups-cells = <2>;
56			interrupt-parent = <&mct_map>;
57			interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
58				     <4 0>, <5 0>;
59	
60			mct_map: mct-map {
61				#interrupt-cells = <2>;
62				#address-cells = <0>;
63				#size-cells = <0>;
64				interrupt-map = <0x0 0 &combiner 23 3>,
65						<0x4 0 &gic 0 120 0>,
66						<0x5 0 &gic 0 121 0>;
67			};
68		};
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