Based on kernel version 2.6.26. Page generated on 2008-07-16 21:12 EST.
1 GPIO Interfaces 2 3 This provides an overview of GPIO access conventions on Linux. 4 5 These calls use the gpio_* naming prefix. No other calls should use that 6 prefix, or the related __gpio_* prefix. 7 8 9 What is a GPIO? 10 =============== 11 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled 12 digital signal. They are provided from many kinds of chip, and are familiar 13 to Linux developers working with embedded and custom hardware. Each GPIO 14 represents a bit connected to a particular pin, or "ball" on Ball Grid Array 15 (BGA) packages. Board schematics show which external hardware connects to 16 which GPIOs. Drivers can be written generically, so that board setup code 17 passes such pin configuration data to drivers. 18 19 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every 20 non-dedicated pin can be configured as a GPIO; and most chips have at least 21 several dozen of them. Programmable logic devices (like FPGAs) can easily 22 provide GPIOs; multifunction chips like power managers, and audio codecs 23 often have a few such pins to help with pin scarcity on SOCs; and there are 24 also "GPIO Expander" chips that connect using the I2C or SPI serial busses. 25 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS 26 firmware knowing how they're used). 27 28 The exact capabilities of GPIOs vary between systems. Common options: 29 30 - Output values are writable (high=1, low=0). Some chips also have 31 options about how that value is driven, so that for example only one 32 value might be driven ... supporting "wire-OR" and similar schemes 33 for the other value (notably, "open drain" signaling). 34 35 - Input values are likewise readable (1, 0). Some chips support readback 36 of pins configured as "output", which is very useful in such "wire-OR" 37 cases (to support bidirectional signaling). GPIO controllers may have 38 input de-glitch/debounce logic, sometimes with software controls. 39 40 - Inputs can often be used as IRQ signals, often edge triggered but 41 sometimes level triggered. Such IRQs may be configurable as system 42 wakeup events, to wake the system from a low power state. 43 44 - Usually a GPIO will be configurable as either input or output, as needed 45 by different product boards; single direction ones exist too. 46 47 - Most GPIOs can be accessed while holding spinlocks, but those accessed 48 through a serial bus normally can't. Some systems support both types. 49 50 On a given board each GPIO is used for one specific purpose like monitoring 51 MMC/SD card insertion/removal, detecting card writeprotect status, driving 52 a LED, configuring a transceiver, bitbanging a serial bus, poking a hardware 53 watchdog, sensing a switch, and so on. 54 55 56 GPIO conventions 57 ================ 58 Note that this is called a "convention" because you don't need to do it this 59 way, and it's no crime if you don't. There **are** cases where portability 60 is not the main issue; GPIOs are often used for the kind of board-specific 61 glue logic that may even change between board revisions, and can't ever be 62 used on a board that's wired differently. Only least-common-denominator 63 functionality can be very portable. Other features are platform-specific, 64 and that can be critical for glue logic. 65 66 Plus, this doesn't require any implementation framework, just an interface. 67 One platform might implement it as simple inline functions accessing chip 68 registers; another might implement it by delegating through abstractions 69 used for several very different kinds of GPIO controller. (There is some 70 optional code supporting such an implementation strategy, described later 71 in this document, but drivers acting as clients to the GPIO interface must 72 not care how it's implemented.) 73 74 That said, if the convention is supported on their platform, drivers should 75 use it when possible. Platforms must declare GENERIC_GPIO support in their 76 Kconfig (boolean true), and provide an <asm/gpio.h> file. Drivers that can't 77 work without standard GPIO calls should have Kconfig entries which depend 78 on GENERIC_GPIO. The GPIO calls are available, either as "real code" or as 79 optimized-away stubs, when drivers use the include file: 80 81 #include <linux/gpio.h> 82 83 If you stick to this convention then it'll be easier for other developers to 84 see what your code is doing, and help maintain it. 85 86 Note that these operations include I/O barriers on platforms which need to 87 use them; drivers don't need to add them explicitly. 88 89 90 Identifying GPIOs 91 ----------------- 92 GPIOs are identified by unsigned integers in the range 0..MAX_INT. That 93 reserves "negative" numbers for other purposes like marking signals as 94 "not available on this board", or indicating faults. Code that doesn't 95 touch the underlying hardware treats these integers as opaque cookies. 96 97 Platforms define how they use those integers, and usually #define symbols 98 for the GPIO lines so that board-specific setup code directly corresponds 99 to the relevant schematics. In contrast, drivers should only use GPIO 100 numbers passed to them from that setup code, using platform_data to hold 101 board-specific pin configuration data (along with other board specific 102 data they need). That avoids portability problems. 103 104 So for example one platform uses numbers 32-159 for GPIOs; while another 105 uses numbers 0..63 with one set of GPIO controllers, 64-79 with another 106 type of GPIO controller, and on one particular board 80-95 with an FPGA. 107 The numbers need not be contiguous; either of those platforms could also 108 use numbers 2000-2063 to identify GPIOs in a bank of I2C GPIO expanders. 109 110 Whether a platform supports multiple GPIO controllers is currently a 111 platform-specific implementation issue. 112 113 114 Using GPIOs 115 ----------- 116 One of the first things to do with a GPIO, often in board setup code when 117 setting up a platform_device using the GPIO, is mark its direction: 118 119 /* set as input or output, returning 0 or negative errno */ 120 int gpio_direction_input(unsigned gpio); 121 int gpio_direction_output(unsigned gpio, int value); 122 123 The return value is zero for success, else a negative errno. It should 124 be checked, since the get/set calls don't have error returns and since 125 misconfiguration is possible. You should normally issue these calls from 126 a task context. However, for spinlock-safe GPIOs it's OK to use them 127 before tasking is enabled, as part of early board setup. 128 129 For output GPIOs, the value provided becomes the initial output value. 130 This helps avoid signal glitching during system startup. 131 132 For compatibility with legacy interfaces to GPIOs, setting the direction 133 of a GPIO implicitly requests that GPIO (see below) if it has not been 134 requested already. That compatibility may be removed in the future; 135 explicitly requesting GPIOs is strongly preferred. 136 137 Setting the direction can fail if the GPIO number is invalid, or when 138 that particular GPIO can't be used in that mode. It's generally a bad 139 idea to rely on boot firmware to have set the direction correctly, since 140 it probably wasn't validated to do more than boot Linux. (Similarly, 141 that board setup code probably needs to multiplex that pin as a GPIO, 142 and configure pullups/pulldowns appropriately.) 143 144 145 Spinlock-Safe GPIO access 146 ------------------------- 147 Most GPIO controllers can be accessed with memory read/write instructions. 148 That doesn't need to sleep, and can safely be done from inside IRQ handlers. 149 (That includes hardirq contexts on RT kernels.) 150 151 Use these calls to access such GPIOs: 152 153 /* GPIO INPUT: return zero or nonzero */ 154 int gpio_get_value(unsigned gpio); 155 156 /* GPIO OUTPUT */ 157 void gpio_set_value(unsigned gpio, int value); 158 159 The values are boolean, zero for low, nonzero for high. When reading the 160 value of an output pin, the value returned should be what's seen on the 161 pin ... that won't always match the specified output value, because of 162 issues including open-drain signaling and output latencies. 163 164 The get/set calls have no error returns because "invalid GPIO" should have 165 been reported earlier from gpio_direction_*(). However, note that not all 166 platforms can read the value of output pins; those that can't should always 167 return zero. Also, using these calls for GPIOs that can't safely be accessed 168 without sleeping (see below) is an error. 169 170 Platform-specific implementations are encouraged to optimize the two 171 calls to access the GPIO value in cases where the GPIO number (and for 172 output, value) are constant. It's normal for them to need only a couple 173 of instructions in such cases (reading or writing a hardware register), 174 and not to need spinlocks. Such optimized calls can make bitbanging 175 applications a lot more efficient (in both space and time) than spending 176 dozens of instructions on subroutine calls. 177 178 179 GPIO access that may sleep 180 -------------------------- 181 Some GPIO controllers must be accessed using message based busses like I2C 182 or SPI. Commands to read or write those GPIO values require waiting to 183 get to the head of a queue to transmit a command and get its response. 184 This requires sleeping, which can't be done from inside IRQ handlers. 185 186 Platforms that support this type of GPIO distinguish them from other GPIOs 187 by returning nonzero from this call (which requires a valid GPIO number, 188 either explicitly or implicitly requested): 189 190 int gpio_cansleep(unsigned gpio); 191 192 To access such GPIOs, a different set of accessors is defined: 193 194 /* GPIO INPUT: return zero or nonzero, might sleep */ 195 int gpio_get_value_cansleep(unsigned gpio); 196 197 /* GPIO OUTPUT, might sleep */ 198 void gpio_set_value_cansleep(unsigned gpio, int value); 199 200 Other than the fact that these calls might sleep, and will not be ignored 201 for GPIOs that can't be accessed from IRQ handlers, these calls act the 202 same as the spinlock-safe calls. 203 204 205 Claiming and Releasing GPIOs (OPTIONAL) 206 --------------------------------------- 207 To help catch system configuration errors, two calls are defined. 208 However, many platforms don't currently support this mechanism. 209 210 /* request GPIO, returning 0 or negative errno. 211 * non-null labels may be useful for diagnostics. 212 */ 213 int gpio_request(unsigned gpio, const char *label); 214 215 /* release previously-claimed GPIO */ 216 void gpio_free(unsigned gpio); 217 218 Passing invalid GPIO numbers to gpio_request() will fail, as will requesting 219 GPIOs that have already been claimed with that call. The return value of 220 gpio_request() must be checked. You should normally issue these calls from 221 a task context. However, for spinlock-safe GPIOs it's OK to request GPIOs 222 before tasking is enabled, as part of early board setup. 223 224 These calls serve two basic purposes. One is marking the signals which 225 are actually in use as GPIOs, for better diagnostics; systems may have 226 several hundred potential GPIOs, but often only a dozen are used on any 227 given board. Another is to catch conflicts, identifying errors when 228 (a) two or more drivers wrongly think they have exclusive use of that 229 signal, or (b) something wrongly believes it's safe to remove drivers 230 needed to manage a signal that's in active use. That is, requesting a 231 GPIO can serve as a kind of lock. 232 233 These two calls are optional because not not all current Linux platforms 234 offer such functionality in their GPIO support; a valid implementation 235 could return success for all gpio_request() calls. Unlike the other calls, 236 the state they represent doesn't normally match anything from a hardware 237 register; it's just a software bitmap which clearly is not necessary for 238 correct operation of hardware or (bug free) drivers. 239 240 Note that requesting a GPIO does NOT cause it to be configured in any 241 way; it just marks that GPIO as in use. Separate code must handle any 242 pin setup (e.g. controlling which pin the GPIO uses, pullup/pulldown). 243 244 Also note that it's your responsibility to have stopped using a GPIO 245 before you free it. 246 247 248 GPIOs mapped to IRQs 249 -------------------- 250 GPIO numbers are unsigned integers; so are IRQ numbers. These make up 251 two logically distinct namespaces (GPIO 0 need not use IRQ 0). You can 252 map between them using calls like: 253 254 /* map GPIO numbers to IRQ numbers */ 255 int gpio_to_irq(unsigned gpio); 256 257 /* map IRQ numbers to GPIO numbers */ 258 int irq_to_gpio(unsigned irq); 259 260 Those return either the corresponding number in the other namespace, or 261 else a negative errno code if the mapping can't be done. (For example, 262 some GPIOs can't be used as IRQs.) It is an unchecked error to use a GPIO 263 number that wasn't set up as an input using gpio_direction_input(), or 264 to use an IRQ number that didn't originally come from gpio_to_irq(). 265 266 These two mapping calls are expected to cost on the order of a single 267 addition or subtraction. They're not allowed to sleep. 268 269 Non-error values returned from gpio_to_irq() can be passed to request_irq() 270 or free_irq(). They will often be stored into IRQ resources for platform 271 devices, by the board-specific initialization code. Note that IRQ trigger 272 options are part of the IRQ interface, e.g. IRQF_TRIGGER_FALLING, as are 273 system wakeup capabilities. 274 275 Non-error values returned from irq_to_gpio() would most commonly be used 276 with gpio_get_value(), for example to initialize or update driver state 277 when the IRQ is edge-triggered. 278 279 280 Emulating Open Drain Signals 281 ---------------------------- 282 Sometimes shared signals need to use "open drain" signaling, where only the 283 low signal level is actually driven. (That term applies to CMOS transistors; 284 "open collector" is used for TTL.) A pullup resistor causes the high signal 285 level. This is sometimes called a "wire-AND"; or more practically, from the 286 negative logic (low=true) perspective this is a "wire-OR". 287 288 One common example of an open drain signal is a shared active-low IRQ line. 289 Also, bidirectional data bus signals sometimes use open drain signals. 290 291 Some GPIO controllers directly support open drain outputs; many don't. When 292 you need open drain signaling but your hardware doesn't directly support it, 293 there's a common idiom you can use to emulate it with any GPIO pin that can 294 be used as either an input or an output: 295 296 LOW: gpio_direction_output(gpio, 0) ... this drives the signal 297 and overrides the pullup. 298 299 HIGH: gpio_direction_input(gpio) ... this turns off the output, 300 so the pullup (or some other device) controls the signal. 301 302 If you are "driving" the signal high but gpio_get_value(gpio) reports a low 303 value (after the appropriate rise time passes), you know some other component 304 is driving the shared signal low. That's not necessarily an error. As one 305 common example, that's how I2C clocks are stretched: a slave that needs a 306 slower clock delays the rising edge of SCK, and the I2C master adjusts its 307 signaling rate accordingly. 308 309 310 What do these conventions omit? 311 =============================== 312 One of the biggest things these conventions omit is pin multiplexing, since 313 this is highly chip-specific and nonportable. One platform might not need 314 explicit multiplexing; another might have just two options for use of any 315 given pin; another might have eight options per pin; another might be able 316 to route a given GPIO to any one of several pins. (Yes, those examples all 317 come from systems that run Linux today.) 318 319 Related to multiplexing is configuration and enabling of the pullups or 320 pulldowns integrated on some platforms. Not all platforms support them, 321 or support them in the same way; and any given board might use external 322 pullups (or pulldowns) so that the on-chip ones should not be used. 323 (When a circuit needs 5 kOhm, on-chip 100 kOhm resistors won't do.) 324 Likewise drive strength (2 mA vs 20 mA) and voltage (1.8V vs 3.3V) is a 325 platform-specific issue, as are models like (not) having a one-to-one 326 correspondence between configurable pins and GPIOs. 327 328 There are other system-specific mechanisms that are not specified here, 329 like the aforementioned options for input de-glitching and wire-OR output. 330 Hardware may support reading or writing GPIOs in gangs, but that's usually 331 configuration dependent: for GPIOs sharing the same bank. (GPIOs are 332 commonly grouped in banks of 16 or 32, with a given SOC having several such 333 banks.) Some systems can trigger IRQs from output GPIOs, or read values 334 from pins not managed as GPIOs. Code relying on such mechanisms will 335 necessarily be nonportable. 336 337 Dynamic definition of GPIOs is not currently standard; for example, as 338 a side effect of configuring an add-on board with some GPIO expanders. 339 340 These calls are purely for kernel space, but a userspace API could be built 341 on top of them. 342 343 344 GPIO implementor's framework (OPTIONAL) 345 ======================================= 346 As noted earlier, there is an optional implementation framework making it 347 easier for platforms to support different kinds of GPIO controller using 348 the same programming interface. 349 350 As a debugging aid, if debugfs is available a /sys/kernel/debug/gpio file 351 will be found there. That will list all the controllers registered through 352 this framework, and the state of the GPIOs currently in use. 353 354 355 Controller Drivers: gpio_chip 356 ----------------------------- 357 In this framework each GPIO controller is packaged as a "struct gpio_chip" 358 with information common to each controller of that type: 359 360 - methods to establish GPIO direction 361 - methods used to access GPIO values 362 - flag saying whether calls to its methods may sleep 363 - optional debugfs dump method (showing extra state like pullup config) 364 - label for diagnostics 365 366 There is also per-instance data, which may come from device.platform_data: 367 the number of its first GPIO, and how many GPIOs it exposes. 368 369 The code implementing a gpio_chip should support multiple instances of the 370 controller, possibly using the driver model. That code will configure each 371 gpio_chip and issue gpiochip_add(). Removing a GPIO controller should be 372 rare; use gpiochip_remove() when it is unavoidable. 373 374 Most often a gpio_chip is part of an instance-specific structure with state 375 not exposed by the GPIO interfaces, such as addressing, power management, 376 and more. Chips such as codecs will have complex non-GPIO state, 377 378 Any debugfs dump method should normally ignore signals which haven't been 379 requested as GPIOs. They can use gpiochip_is_requested(), which returns 380 either NULL or the label associated with that GPIO when it was requested. 381 382 383 Platform Support 384 ---------------- 385 To support this framework, a platform's Kconfig will "select HAVE_GPIO_LIB" 386 and arrange that its <asm/gpio.h> includes <asm-generic/gpio.h> and defines 387 three functions: gpio_get_value(), gpio_set_value(), and gpio_cansleep(). 388 They may also want to provide a custom value for ARCH_NR_GPIOS. 389 390 Trivial implementations of those functions can directly use framework 391 code, which always dispatches through the gpio_chip: 392 393 #define gpio_get_value __gpio_get_value 394 #define gpio_set_value __gpio_set_value 395 #define gpio_cansleep __gpio_cansleep 396 397 Fancier implementations could instead define those as inline functions with 398 logic optimizing access to specific SOC-based GPIOs. For example, if the 399 referenced GPIO is the constant "12", getting or setting its value could 400 cost as little as two or three instructions, never sleeping. When such an 401 optimization is not possible those calls must delegate to the framework 402 code, costing at least a few dozen instructions. For bitbanged I/O, such 403 instruction savings can be significant. 404 405 For SOCs, platform-specific code defines and registers gpio_chip instances 406 for each bank of on-chip GPIOs. Those GPIOs should be numbered/labeled to 407 match chip vendor documentation, and directly match board schematics. They 408 may well start at zero and go up to a platform-specific limit. Such GPIOs 409 are normally integrated into platform initialization to make them always be 410 available, from arch_initcall() or earlier; they can often serve as IRQs. 411 412 413 Board Support 414 ------------- 415 For external GPIO controllers -- such as I2C or SPI expanders, ASICs, multi 416 function devices, FPGAs or CPLDs -- most often board-specific code handles 417 registering controller devices and ensures that their drivers know what GPIO 418 numbers to use with gpiochip_add(). Their numbers often start right after 419 platform-specific GPIOs. 420 421 For example, board setup code could create structures identifying the range 422 of GPIOs that chip will expose, and passes them to each GPIO expander chip 423 using platform_data. Then the chip driver's probe() routine could pass that 424 data to gpiochip_add(). 425 426 Initialization order can be important. For example, when a device relies on 427 an I2C-based GPIO, its probe() routine should only be called after that GPIO 428 becomes available. That may mean the device should not be registered until 429 calls for that GPIO can work. One way to address such dependencies is for 430 such gpio_chip controllers to provide setup() and teardown() callbacks to 431 board specific code; those board specific callbacks would register devices 432 once all the necessary resources are available.
