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Documentation / x86 / x86_64 / boot-options.txt

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Based on kernel version 4.2. Page generated on 2015-09-09 12:15 EST.

1	AMD64 specific boot options
3	There are many others (usually documented in driver documentation), but
4	only the AMD64 specific ones are listed here.
6	Machine check
8	   Please see Documentation/x86/x86_64/machinecheck for sysfs runtime tunables.
10	   mce=off
11			Disable machine check
12	   mce=no_cmci
13			Disable CMCI(Corrected Machine Check Interrupt) that
14			Intel processor supports.  Usually this disablement is
15			not recommended, but it might be handy if your hardware
16			is misbehaving.
17			Note that you'll get more problems without CMCI than with
18			due to the shared banks, i.e. you might get duplicated
19			error logs.
20	   mce=dont_log_ce
21			Don't make logs for corrected errors.  All events reported
22			as corrected are silently cleared by OS.
23			This option will be useful if you have no interest in any
24			of corrected errors.
25	   mce=ignore_ce
26			Disable features for corrected errors, e.g. polling timer
27			and CMCI.  All events reported as corrected are not cleared
28			by OS and remained in its error banks.
29			Usually this disablement is not recommended, however if
30			there is an agent checking/clearing corrected errors
31			(e.g. BIOS or hardware monitoring applications), conflicting
32			with OS's error handling, and you cannot deactivate the agent,
33			then this option will be a help.
34	   mce=no_lmce
35			Do not opt-in to Local MCE delivery. Use legacy method
36			to broadcast MCEs.
37	   mce=bootlog
38			Enable logging of machine checks left over from booting.
39			Disabled by default on AMD because some BIOS leave bogus ones.
40			If your BIOS doesn't do that it's a good idea to enable though
41			to make sure you log even machine check events that result
42			in a reboot. On Intel systems it is enabled by default.
43	   mce=nobootlog
44			Disable boot machine check logging.
45	   mce=tolerancelevel[,monarchtimeout] (number,number)
46			tolerance levels:
47			0: always panic on uncorrected errors, log corrected errors
48			1: panic or SIGBUS on uncorrected errors, log corrected errors
49			2: SIGBUS or log uncorrected errors, log corrected errors
50			3: never panic or SIGBUS, log all errors (for testing only)
51			Default is 1
52			Can be also set using sysfs which is preferable.
53			monarchtimeout:
54			Sets the time in us to wait for other CPUs on machine checks. 0
55			to disable.
56	   mce=bios_cmci_threshold
57			Don't overwrite the bios-set CMCI threshold. This boot option
58			prevents Linux from overwriting the CMCI threshold set by the
59			bios. Without this option, Linux always sets the CMCI
60			threshold to 1. Enabling this may make memory predictive failure
61			analysis less effective if the bios sets thresholds for memory
62			errors since we will not see details for all errors.
64	   nomce (for compatibility with i386): same as mce=off
66	   Everything else is in sysfs now.
68	APICs
70	   apic		 Use IO-APIC. Default
72	   noapic	 Don't use the IO-APIC.
74	   disableapic	 Don't use the local APIC
76	   nolapic	 Don't use the local APIC (alias for i386 compatibility)
78	   pirq=...	 See Documentation/x86/i386/IO-APIC.txt
80	   noapictimer	 Don't set up the APIC timer
82	   no_timer_check Don't check the IO-APIC timer. This can work around
83			 problems with incorrect timer initialization on some boards.
84	   apicpmtimer
85			 Do APIC timer calibration using the pmtimer. Implies
86			 apicmaintimer. Useful when your PIT timer is totally
87			 broken.
89	Timing
91	  notsc
92	  Don't use the CPU time stamp counter to read the wall time.
93	  This can be used to work around timing problems on multiprocessor systems
94	  with not properly synchronized CPUs.
96	  nohpet
97	  Don't use the HPET timer.
99	Idle loop
101	  idle=poll
102	  Don't do power saving in the idle loop using HLT, but poll for rescheduling
103	  event. This will make the CPUs eat a lot more power, but may be useful
104	  to get slightly better performance in multiprocessor benchmarks. It also
105	  makes some profiling using performance counters more accurate.
106	  Please note that on systems with MONITOR/MWAIT support (like Intel EM64T
107	  CPUs) this option has no performance advantage over the normal idle loop.
108	  It may also interact badly with hyperthreading.
110	Rebooting
112	   reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] [, [w]arm | [c]old]
113	   bios	  Use the CPU reboot vector for warm reset
114	   warm   Don't set the cold reboot flag
115	   cold   Set the cold reboot flag
116	   triple Force a triple fault (init)
117	   kbd    Use the keyboard controller. cold reset (default)
118	   acpi   Use the ACPI RESET_REG in the FADT. If ACPI is not configured or the
119	          ACPI reset does not work, the reboot path attempts the reset using
120	          the keyboard controller.
121	   efi    Use efi reset_system runtime service. If EFI is not configured or the
122	          EFI reset does not work, the reboot path attempts the reset using
123	          the keyboard controller.
125	   Using warm reset will be much faster especially on big memory
126	   systems because the BIOS will not go through the memory check.
127	   Disadvantage is that not all hardware will be completely reinitialized
128	   on reboot so there may be boot problems on some systems.
130	   reboot=force
132	   Don't stop other CPUs on reboot. This can make reboot more reliable
133	   in some cases.
135	Non Executable Mappings
137	  noexec=on|off
139	  on      Enable(default)
140	  off     Disable
142	NUMA
144	  numa=off	Only set up a single NUMA node spanning all memory.
146	  numa=noacpi   Don't parse the SRAT table for NUMA setup
148	  numa=fake=<size>[MG]
149			If given as a memory unit, fills all system RAM with nodes of
150			size interleaved over physical nodes.
152	  numa=fake=<N>
153			If given as an integer, fills all system RAM with N fake nodes
154			interleaved over physical nodes.
156	ACPI
158	  acpi=off	Don't enable ACPI
159	  acpi=ht	Use ACPI boot table parsing, but don't enable ACPI
160			interpreter
161	  acpi=force	Force ACPI on (currently not needed)
163	  acpi=strict   Disable out of spec ACPI workarounds.
165	  acpi_sci={edge,level,high,low}  Set up ACPI SCI interrupt.
167	  acpi=noirq	Don't route interrupts
169	  acpi=nocmcff	Disable firmware first mode for corrected errors. This
170			disables parsing the HEST CMC error source to check if
171			firmware has set the FF flag. This may result in
172			duplicate corrected error reports.
174	PCI
176	  pci=off		Don't use PCI
177	  pci=conf1		Use conf1 access.
178	  pci=conf2		Use conf2 access.
179	  pci=rom		Assign ROMs.
180	  pci=assign-busses	Assign busses
181	  pci=irqmask=MASK	Set PCI interrupt mask to MASK
182	  pci=lastbus=NUMBER	Scan up to NUMBER busses, no matter what the mptable says.
183	  pci=noacpi		Don't use ACPI to set up PCI interrupt routing.
185	IOMMU (input/output memory management unit)
187	 Currently four x86-64 PCI-DMA mapping implementations exist:
189	   1. <arch/x86_64/kernel/pci-nommu.c>: use no hardware/software IOMMU at all
190	      (e.g. because you have < 3 GB memory).
191	      Kernel boot message: "PCI-DMA: Disabling IOMMU"
193	   2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU.
194	      Kernel boot message: "PCI-DMA: using GART IOMMU"
196	   3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
197	      e.g. if there is no hardware IOMMU in the system and it is need because
198	      you have >3GB memory or told the kernel to us it (iommu=soft))
199	      Kernel boot message: "PCI-DMA: Using software bounce buffering
200	      for IO (SWIOTLB)"
202	   4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM
203	      pSeries and xSeries servers. This hardware IOMMU supports DMA address
204	      mapping with memory protection, etc.
205	      Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
207	 iommu=[<size>][,noagp][,off][,force][,noforce][,leak[=<nr_of_leak_pages>]
208		[,memaper[=<order>]][,merge][,forcesac][,fullflush][,nomerge]
209		[,noaperture][,calgary]
211	  General iommu options:
212	    off                Don't initialize and use any kind of IOMMU.
213	    noforce            Don't force hardware IOMMU usage when it is not needed.
214	                       (default).
215	    force              Force the use of the hardware IOMMU even when it is
216	                       not actually needed (e.g. because < 3 GB memory).
217	    soft               Use software bounce buffering (SWIOTLB) (default for
218	                       Intel machines). This can be used to prevent the usage
219	                       of an available hardware IOMMU.
221	  iommu options only relevant to the AMD GART hardware IOMMU:
222	    <size>             Set the size of the remapping area in bytes.
223	    allowed            Overwrite iommu off workarounds for specific chipsets.
224	    fullflush          Flush IOMMU on each allocation (default).
225	    nofullflush        Don't use IOMMU fullflush.
226	    leak               Turn on simple iommu leak tracing (only when
227	                       CONFIG_IOMMU_LEAK is on). Default number of leak pages
228	                       is 20.
229	    memaper[=<order>]  Allocate an own aperture over RAM with size 32MB<<order.
230	                       (default: order=1, i.e. 64MB)
231	    merge              Do scatter-gather (SG) merging. Implies "force"
232	                       (experimental).
233	    nomerge            Don't do scatter-gather (SG) merging.
234	    noaperture         Ask the IOMMU not to touch the aperture for AGP.
235	    forcesac           Force single-address cycle (SAC) mode for masks <40bits
236	                       (experimental).
237	    noagp              Don't initialize the AGP driver and use full aperture.
238	    allowdac           Allow double-address cycle (DAC) mode, i.e. DMA >4GB.
239	                       DAC is used with 32-bit PCI to push a 64-bit address in
240	                       two cycles. When off all DMA over >4GB is forced through
241	                       an IOMMU or software bounce buffering.
242	    nodac              Forbid DAC mode, i.e. DMA >4GB.
243	    panic              Always panic when IOMMU overflows.
244	    calgary            Use the Calgary IOMMU if it is available
246	  iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
247	  implementation:
248	    swiotlb=<pages>[,force]
249	    <pages>            Prereserve that many 128K pages for the software IO
250	                       bounce buffering.
251	    force              Force all IO through the software TLB.
253	  Settings for the IBM Calgary hardware IOMMU currently found in IBM
254	  pSeries and xSeries machines:
256	    calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
257	    calgary=[translate_empty_slots]
258	    calgary=[disable=<PCI bus number>]
259	    panic              Always panic when IOMMU overflows
261	    64k,...,8M - Set the size of each PCI slot's translation table
262	    when using the Calgary IOMMU. This is the size of the translation
263	    table itself in main memory. The smallest table, 64k, covers an IO
264	    space of 32MB; the largest, 8MB table, can cover an IO space of
265	    4GB. Normally the kernel will make the right choice by itself.
267	    translate_empty_slots - Enable translation even on slots that have
268	    no devices attached to them, in case a device will be hotplugged
269	    in the future.
271	    disable=<PCI bus number> - Disable translation on a given PHB. For
272	    example, the built-in graphics adapter resides on the first bridge
273	    (PCI bus number 0); if translation (isolation) is enabled on this
274	    bridge, X servers that access the hardware directly from user
275	    space might stop working. Use this option if you have devices that
276	    are accessed from userspace directly on some PCI host bridge.
278	Debugging
280	  kstack=N	Print N words from the kernel stack in oops dumps.
282	Miscellaneous
284		nogbpages
285			Do not use GB pages for kernel direct mappings.
286		gbpages
287			Use GB pages for kernel direct mappings.
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