Documentation / devicetree / bindings / arm / altera / socfpga-sdram-edac.txt


Based on kernel version 6.8. Page generated on 2024-03-11 21:26 EST.

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Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
The EDAC accesses a range of registers in the SDRAM controller.

Required properties:
- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"
- altr,sdr-syscon : phandle of the sdr module
- interrupts : Should contain the SDRAM ECC IRQ in the
	appropriate format for the IRQ controller.

Example:
	sdramedac {
		compatible = "altr,sdram-edac";
		altr,sdr-syscon = <&sdr>;
		interrupts = <0 39 4>;
	};