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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 | Broadcom Northstar Plus SoC CPU Enable Method --------------------------------------------- This binding defines the enable method used for starting secondary CPU in the following Broadcom SoCs: BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 The enable method is specified by defining the following required properties in the corresponding secondary "cpu" device tree node: - enable-method = "brcm,bcm-nsp-smp"; - secondary-boot-reg = <...>; The secondary-boot-reg property is a u32 value that specifies the physical address of the register which should hold the common entry point for a secondary CPU. This entry is cpu node specific and should be added per cpu. E.g., in case of NSP (BCM58625) which is a dual core CPU SoC, this entry should be added to cpu1 node. Example: cpus { #address-cells = <1>; #size-cells = <0>; cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0>; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; enable-method = "brcm,bcm-nsp-smp"; secondary-boot-reg = <0xffff042c>; reg = <1>; }; }; |