Based on kernel version 5.10.1
. Page generated on 2020-12-14 21:14 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 | Picochip picoXcell SPAcc (Security Protocol Accelerator) bindings Picochip picoXcell devices contain crypto offload engines that may be used for IPSEC and femtocell layer 2 ciphering. Required properties: - compatible : "picochip,spacc-ipsec" for the IPSEC offload engine "picochip,spacc-l2" for the femtocell layer 2 ciphering engine. - reg : Offset and length of the register set for this device - interrupts : The interrupt line from the SPAcc. - ref-clock : The input clock that drives the SPAcc. Example SPAcc node: spacc@10000 { compatible = "picochip,spacc-ipsec"; reg = <0x100000 0x10000>; interrupt-parent = <&vic0>; interrupts = <24>; ref-clock = <&ipsec_clk>, "ref"; }; |