Based on kernel version 6.8
. Page generated on 2024-03-11 21:26 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 | * Hisilicon K3 DMA controller See dma.txt first Required properties: - compatible: Must be one of - "hisilicon,k3-dma-1.0" - "hisilicon,hisi-pcm-asp-dma-1.0" - reg: Should contain DMA registers location and length. - interrupts: Should contain one interrupt shared by all channel - #dma-cells: see dma.txt, should be 1, para number - dma-channels: physical channels supported - dma-requests: virtual channels supported, each virtual channel have specific request line - clocks: clock required Example: Controller: dma0: dma@fcd02000 { compatible = "hisilicon,k3-dma-1.0"; reg = <0xfcd02000 0x1000>; #dma-cells = <1>; dma-channels = <16>; dma-requests = <27>; interrupts = <0 12 4>; clocks = <&pclk>; }; Client: Use specific request line passing from dmax For example, i2c0 read channel request line is 18, while write channel use 19 i2c0: i2c@fcb08000 { compatible = "snps,designware-i2c"; dmas = <&dma0 18 /* read channel */ &dma0 19>; /* write channel */ dma-names = "rx", "tx"; }; i2c1: i2c@fcb09000 { compatible = "snps,designware-i2c"; dmas = <&dma0 20 /* read channel */ &dma0 21>; /* write channel */ dma-names = "rx", "tx"; }; |