Based on kernel version 5.16
. Page generated on 2022-01-10 18:31 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 | * Samsung's High Speed I2C controller The Samsung's High Speed I2C controller is used to interface with I2C devices at various speeds ranging from 100khz to 3.4Mhz. Required properties: - compatible: value should be. -> "samsung,exynos5-hsi2c", (DEPRECATED) for i2c compatible with HSI2C available on Exynos5250 and Exynos5420 SoCs. -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available on Exynos5250 and Exynos5420 SoCs. -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available on Exynos5260 SoCs. -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available on Exynos7 SoCs. - reg: physical base address of the controller and length of memory mapped region. - interrupts: interrupt number to the cpu. - #address-cells: always 1 (for i2c addresses) - #size-cells: always 0 - Pinctrl: - pinctrl-0: Pin control group to be used for this controller. - pinctrl-names: Should contain only one value - "default". Optional properties: - clock-frequency: Desired operating frequency in Hz of the bus. -> If not specified, the bus operates in fast-speed mode at at 100khz. -> If specified, the bus operates in high-speed mode only if the clock-frequency is >= 1Mhz. Example: hsi2c@12ca0000 { compatible = "samsung,exynos5250-hsi2c"; reg = <0x12ca0000 0x100>; interrupts = <56>; clock-frequency = <100000>; pinctrl-0 = <&i2c4_bus>; pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; s2mps11_pmic@66 { compatible = "samsung,s2mps11-pmic"; reg = <0x66>; }; }; |