Based on kernel version 4.16.1. Page generated on 2018-04-09 11:52 EST.
1 2 * Marvell MV64XXX I2C controller 3 4 Required properties : 5 6 - reg : Offset and length of the register set for the device 7 - compatible : Should be either: 8 - "allwinner,sun4i-a10-i2c" 9 - "allwinner,sun6i-a31-i2c" 10 - "marvell,mv64xxx-i2c" 11 - "marvell,mv78230-i2c" 12 - "marvell,mv78230-a0-i2c" 13 * Note: Only use "marvell,mv78230-a0-i2c" for a 14 very rare, initial version of the SoC which 15 had broken offload support. Linux 16 auto-detects this and sets it appropriately. 17 - interrupts : The interrupt number 18 19 Optional properties : 20 21 - clock-frequency : Desired I2C bus clock frequency in Hz. If not set the 22 default frequency is 100kHz 23 24 - resets : phandle to the parent reset controller. Mandatory 25 whenever you're using the "allwinner,sun6i-a31-i2c" 26 compatible. 27 28 - clocks: : pointers to the reference clocks for this device, the 29 first one is the one used for the clock on the i2c bus, 30 the second one is the clock used to acces the registers 31 of the controller 32 33 - clock-names : names of used clocks, mandatory if the second clock is 34 used, the name must be "core", and "reg" (the latter is 35 only for Armada 7K/8K). 36 37 Examples: 38 39 i2c@11000 { 40 compatible = "marvell,mv64xxx-i2c"; 41 reg = <0x11000 0x20>; 42 interrupts = <29>; 43 clock-frequency = <100000>; 44 }; 45 46 For the Armada XP: 47 48 i2c@11000 { 49 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; 50 reg = <0x11000 0x100>; 51 interrupts = <29>; 52 clock-frequency = <100000>; 53 }; 54 55 For the Armada 7040: 56 57 i2c@701000 { 58 compatible = "marvell,mv78230-i2c"; 59 reg = <0x701000 0x20>; 60 interrupts = <29>; 61 clock-frequency = <100000>; 62 clock-names = "core", "reg"; 63 clocks = <&core_clock>, <®_clock>; 64 };