Documentation / devicetree / bindings / interrupt-controller / al,alpine-msix.txt


Based on kernel version 6.8. Page generated on 2024-03-11 21:26 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Alpine MSIX controller

See arm,gic-v3.txt for SPI and MSI definitions.

Required properties:

- compatible: should be "al,alpine-msix"
- reg: physical base address and size of the registers
- interrupt-controller: identifies the node as an interrupt controller
- msi-controller: identifies the node as an PCI Message Signaled Interrupt
		  controller
- al,msi-base-spi: SPI base of the MSI frame
- al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0

Example:

msix: msix {
	compatible = "al,alpine-msix";
	reg = <0x0 0xfbe00000 0x0 0x100000>;
	interrupt-parent = <&gic>;
	interrupt-controller;
	msi-controller;
	al,msi-base-spi = <160>;
	al,msi-num-spis = <160>;
};