Documentation / devicetree / bindings / interrupt-controller / arm,vic.txt


Based on kernel version 5.13. Page generated on 2021-06-28 07:05 EST.

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* ARM Vectored Interrupt Controller

One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM
system for interrupt routing.  For multiple controllers they can either be
nested or have the outputs wire-OR'd together.

Required properties:

- compatible : should be one of
	"arm,pl190-vic"
	"arm,pl192-vic"
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : The number of cells to define the interrupts.  Must be 1 as
  the VIC has no configuration options for interrupt sources.  The cell is a u32
  and defines the interrupt number.
- reg : The register bank for the VIC.

Optional properties:

- interrupts : Interrupt source for parent controllers if the VIC is nested.
- valid-mask : A one cell big bit mask of valid interrupt sources. Each bit
  represents single interrupt source, starting from source 0 at LSb and ending
  at source 31 at MSb. A bit that is set means that the source is wired and
  clear means otherwise. If unspecified, defaults to all valid.
- valid-wakeup-mask : A one cell big bit mask of interrupt sources that can be
  configured as wake up source for the system. Order of bits is the same as for
  valid-mask property. A set bit means that this interrupt source can be
  configured as a wake up source for the system. If unspecied, defaults to all
  interrupt sources configurable as wake up sources.

Example:

	vic0: interrupt-controller@60000 {
		compatible = "arm,pl192-vic";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0x60000 0x1000>;

		valid-mask = <0xffffff7f>;
		valid-wakeup-mask = <0x0000ff7f>;
	};