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Documentation / devicetree / bindings / mmc / sunxi-mmc.txt




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Based on kernel version 4.9. Page generated on 2016-12-21 14:31 EST.

1	* Allwinner sunxi MMC controller
2	
3	The highspeed MMC host controller on Allwinner SoCs provides an interface
4	for MMC, SD and SDIO types of memory cards.
5	
6	Supported maximum speeds are the ones of the eMMC standard 4.5 as well
7	as the speed of SD standard 3.0.
8	Absolute maximum transfer rate is 200MB/s
9	
10	Required properties:
11	 - compatible : should be one of:
12	   * "allwinner,sun4i-a10-mmc"
13	   * "allwinner,sun5i-a13-mmc"
14	   * "allwinner,sun7i-a20-mmc"
15	   * "allwinner,sun9i-a80-mmc"
16	   * "allwinner,sun50i-a64-mmc"
17	 - reg : mmc controller base registers
18	 - clocks : a list with 4 phandle + clock specifier pairs
19	 - clock-names : must contain "ahb", "mmc", "output" and "sample"
20	 - interrupts : mmc controller interrupt
21	
22	Optional properties:
23	 - resets : phandle + reset specifier pair
24	 - reset-names : must contain "ahb"
25	 - for cd, bus-width and additional generic mmc parameters
26	   please refer to mmc.txt within this directory
27	
28	Examples:
29		- Within .dtsi:
30		mmc0: mmc@01c0f000 {
31			compatible = "allwinner,sun5i-a13-mmc";
32			reg = <0x01c0f000 0x1000>;
33			clocks = <&ahb_gates 8>, <&mmc0_clk>, <&mmc0_output_clk>, <&mmc0_sample_clk>;
34			clock-names = "ahb", "mod", "output", "sample";
35			interrupts = <0 32 4>;
36			status = "disabled";
37		};
38	
39		- Within dts:
40		mmc0: mmc@01c0f000 {
41			pinctrl-names = "default", "default";
42			pinctrl-0 = <&mmc0_pins_a>;
43			pinctrl-1 = <&mmc0_cd_pin_reference_design>;
44			bus-width = <4>;
45			cd-gpios = <&pio 7 1 0>; /* PH1 */
46			cd-inverted;
47			status = "okay";
48		};
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