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Documentation / devicetree / bindings / mmc / sunxi-mmc.txt




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Based on kernel version 4.13.3. Page generated on 2017-09-23 13:55 EST.

1	* Allwinner sunxi MMC controller
2	
3	The highspeed MMC host controller on Allwinner SoCs provides an interface
4	for MMC, SD and SDIO types of memory cards.
5	
6	Supported maximum speeds are the ones of the eMMC standard 4.5 as well
7	as the speed of SD standard 3.0.
8	Absolute maximum transfer rate is 200MB/s
9	
10	Required properties:
11	 - compatible : should be one of:
12	   * "allwinner,sun4i-a10-mmc"
13	   * "allwinner,sun5i-a13-mmc"
14	   * "allwinner,sun7i-a20-mmc"
15	   * "allwinner,sun9i-a80-mmc"
16	   * "allwinner,sun50i-a64-emmc"
17	   * "allwinner,sun50i-a64-mmc"
18	 - reg : mmc controller base registers
19	 - clocks : a list with 4 phandle + clock specifier pairs
20	 - clock-names : must contain "ahb", "mmc", "output" and "sample"
21	 - interrupts : mmc controller interrupt
22	
23	Optional properties:
24	 - resets : phandle + reset specifier pair
25	 - reset-names : must contain "ahb"
26	 - for cd, bus-width and additional generic mmc parameters
27	   please refer to mmc.txt within this directory
28	
29	Examples:
30		- Within .dtsi:
31		mmc0: mmc@01c0f000 {
32			compatible = "allwinner,sun5i-a13-mmc";
33			reg = <0x01c0f000 0x1000>;
34			clocks = <&ahb_gates 8>, <&mmc0_clk>, <&mmc0_output_clk>, <&mmc0_sample_clk>;
35			clock-names = "ahb", "mod", "output", "sample";
36			interrupts = <0 32 4>;
37			status = "disabled";
38		};
39	
40		- Within dts:
41		mmc0: mmc@01c0f000 {
42			pinctrl-names = "default", "default";
43			pinctrl-0 = <&mmc0_pins_a>;
44			pinctrl-1 = <&mmc0_cd_pin_reference_design>;
45			bus-width = <4>;
46			cd-gpios = <&pio 7 1 0>; /* PH1 */
47			cd-inverted;
48			status = "okay";
49		};
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