Based on kernel version 5.15
. Page generated on 2021-11-01 09:19 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 | * Marvell International Ltd. NCI NFC Controller Required properties: - compatible: Should be: - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices - "marvell,nfc-i2c" for I2C devices - "marvell,nfc-spi" for SPI devices Optional SoC specific properties: - pinctrl-names: Contains only one value - "default". - pintctrl-0: Specifies the pin control groups used for this controller. - reset-n-io: Output GPIO pin used to reset the chip (active low). - hci-muxed: Specifies that the chip is muxing NCI over HCI frames. Optional UART-based chip specific properties: - flow-control: Specifies that the chip is using RTS/CTS. - break-control: Specifies that the chip needs specific break management. Optional I2C-based chip specific properties: - i2c-int-falling: Specifies that the chip read event shall be trigged on falling edge. - i2c-int-rising: Specifies that the chip read event shall be trigged on rising edge. Example (for ARM-based BeagleBoard Black with 88W8887 on UART5): &uart5 { nfcmrvluart: nfcmrvluart@5 { compatible = "marvell,nfc-uart"; reset-n-io = <&gpio3 16 0>; hci-muxed; flow-control; } }; Example (for ARM-based BeagleBoard Black with 88W8887 on I2C1): &i2c1 { clock-frequency = <400000>; nfcmrvli2c0: i2c@1 { compatible = "marvell,nfc-i2c"; reg = <0x8>; /* I2C INT configuration */ interrupt-parent = <&gpio3>; interrupts = <21 0>; /* I2C INT trigger configuration */ i2c-int-rising; /* Reset IO */ reset-n-io = <&gpio3 19 0>; }; }; Example (for ARM-based BeagleBoard Black on SPI0): &spi0 { mrvlnfcspi0: spi@0 { compatible = "marvell,nfc-spi"; reg = <0>; /* SPI Bus configuration */ spi-max-frequency = <3000000>; spi-cpha; spi-cpol; /* SPI INT configuration */ interrupt-parent = <&gpio1>; interrupts = <17 0>; /* Reset IO */ reset-n-io = <&gpio3 19 0>; }; }; |