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Based on kernel version 4.13.3. Page generated on 2017-09-23 13:55 EST.

1	PCI bus bridges have standardized Device Tree bindings:
3	PCI Bus Binding to: IEEE Std 1275-1994
4	http://www.firmware.org/1275/bindings/pci/pci2_1.pdf
6	And for the interrupt mapping part:
8	Open Firmware Recommended Practice: Interrupt Mapping
9	http://www.firmware.org/1275/practice/imap/imap0_9d.pdf
11	Additionally to the properties specified in the above standards a host bridge
12	driver implementation may support the following properties:
14	- linux,pci-domain:
15	   If present this property assigns a fixed PCI domain number to a host bridge,
16	   otherwise an unstable (across boots) unique number will be assigned.
17	   It is required to either not set this property at all or set it for all
18	   host bridges in the system, otherwise potentially conflicting domain numbers
19	   may be assigned to root buses behind different host bridges.  The domain
20	   number for each host bridge in the system must be unique.
21	- max-link-speed:
22	   If present this property specifies PCI gen for link capability.  Host
23	   drivers could add this as a strategy to avoid unnecessary operation for
24	   unsupported link speed, for instance, trying to do training for
25	   unsupported link speed, etc.  Must be '4' for gen4, '3' for gen3, '2'
26	   for gen2, and '1' for gen1. Any other values are invalid.
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