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Documentation / devicetree / bindings / pci / designware-pcie.txt




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Based on kernel version 4.13.3. Page generated on 2017-09-23 13:55 EST.

1	* Synopsys Designware PCIe interface
2	
3	Required properties:
4	- compatible: should contain "snps,dw-pcie" to identify the core.
5	- reg: Should contain the configuration address space.
6	- reg-names: Must be "config" for the PCIe configuration space.
7	    (The old way of getting the configuration address space from "ranges"
8	    is deprecated and should be avoided.)
9	- num-lanes: number of lanes to use
10	RC mode:
11	- #address-cells: set to <3>
12	- #size-cells: set to <2>
13	- device_type: set to "pci"
14	- ranges: ranges for the PCI memory and I/O regions
15	- #interrupt-cells: set to <1>
16	- interrupt-map-mask and interrupt-map: standard PCI
17		properties to define the mapping of the PCIe interface to interrupt
18		numbers.
19	EP mode:
20	- num-ib-windows: number of inbound address translation
21	        windows
22	- num-ob-windows: number of outbound address translation
23	        windows
24	
25	Optional properties:
26	- num-lanes: number of lanes to use (this property should be specified unless
27	  the link is brought already up in BIOS)
28	- reset-gpio: gpio pin number of power good signal
29	- clocks: Must contain an entry for each entry in clock-names.
30		See ../clocks/clock-bindings.txt for details.
31	- clock-names: Must include the following entries:
32		- "pcie"
33		- "pcie_bus"
34	RC mode:
35	- num-viewport: number of view ports configured in
36	  hardware. If a platform does not specify it, the driver assumes 2.
37	- bus-range: PCI bus numbers covered (it is recommended
38	  for new devicetrees to specify this property, to keep backwards
39	  compatibility a range of 0x00-0xff is assumed if not present)
40	EP mode:
41	- max-functions: maximum number of functions that can be
42	  configured
43	
44	Example configuration:
45	
46		pcie: pcie@dffff000 {
47			compatible = "snps,dw-pcie";
48			reg = <0xdffff000 0x1000>, /* Controller registers */
49			      <0xd0000000 0x2000>; /* PCI config space */
50			reg-names = "ctrlreg", "config";
51			#address-cells = <3>;
52			#size-cells = <2>;
53			device_type = "pci";
54			ranges = <0x81000000 0 0x00000000 0xde000000 0 0x00010000
55				  0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000>;
56			interrupts = <25>, <24>;
57			#interrupt-cells = <1>;
58			num-lanes = <1>;
59			num-viewport = <3>;
60		};
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