Based on kernel version 6.8
. Page generated on 2024-03-11 21:26 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 | Rockchip EMMC PHY ----------------------- Required properties: - compatible: rockchip,rk3399-emmc-phy - #phy-cells: must be 0 - reg: PHY register address offset and length in "general register files" Optional properties: - clock-names: Should contain "emmcclk". Although this is listed as optional (because most boards can get basic functionality without having access to it), it is strongly suggested. See ../clock/clock-bindings.txt for details. - clocks: Should have a phandle to the card clock exported by the SDHCI driver. - drive-impedance-ohm: Specifies the drive impedance in Ohm. Possible values are 33, 40, 50, 66 and 100. If not set, the default value of 50 will be applied. - rockchip,enable-strobe-pulldown: Enable internal pull-down for the strobe line. If not set, pull-down is not used. - rockchip,output-tapdelay-select: Specifies the phyctrl_otapdlysec register. If not set, the register defaults to 0x4. Maximum value 0xf. Example: grf: syscon@ff770000 { compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; #address-cells = <1>; #size-cells = <1>; ... emmcphy: phy@f780 { compatible = "rockchip,rk3399-emmc-phy"; reg = <0xf780 0x20>; clocks = <&sdhci>; clock-names = "emmcclk"; drive-impedance-ohm = <50>; #phy-cells = <0>; }; }; |