Based on kernel version 5.15
. Page generated on 2021-11-01 09:19 EST
.
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* BCM63xx UART
Required properties:
- compatible: "brcm,bcm6345-uart"
- reg: The base address of the UART register bank.
- interrupts: A single interrupt specifier.
- clocks: Clock driving the hardware; used to figure out the baud rate
divisor.
Optional properties:
- clock-names: Should be "refclk".
Example:
uart0: serial@14e00520 {
compatible = "brcm,bcm6345-uart";
reg = <0x14e00520 0x18>;
interrupt-parent = <&periph_intc>;
interrupts = <2>;
clocks = <&periph_clk>;
clock-names = "refclk";
};
clocks {
periph_clk: periph_clk@0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <54000000>;
};
};
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- << [ bindings ]
- 8250.yaml
- 8250_omap.yaml
- actions,owl-uart.txt
- altera_jtaguart.txt
- altera_uart.txt
- amlogic,meson-uart.yaml
- arc-uart.txt
- arm,mps2-uart.txt
- arm_sbsa_uart.txt
- brcm,bcm2835-aux-uart.txt
- brcm,bcm6345-uart.txt
- brcm,bcm7271-uart.yaml
- cavium-uart.txt
- cdns,uart.yaml
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- digicolor-usart.txt
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- fsl,s32-linflexuart.txt
- fsl-imx-uart.yaml
- fsl-lpuart.yaml
- fsl-mxs-auart.yaml
- ingenic,uart.yaml
- lantiq_asc.txt
- litex,liteuart.yaml
- maxim,max310x.txt
- microchip,pic32-uart.txt
- milbeaut-uart.txt
- mrvl,pxa-ssp.txt
- mtk-uart.txt
- mvebu-uart.txt
- nvidia,tegra194-tcu.txt
- nvidia,tegra20-hsuart.txt
- nxp,lpc1850-uart.txt
- nxp,sc16is7xx.txt
- nxp-lpc32xx-hsuart.txt
- pl011.yaml
- qca,ar9330-uart.yaml
- qcom,msm-uart.txt
- qcom,msm-uartdm.txt
- rda,8810pl-uart.txt
- renesas,em-uart.yaml
- renesas,hscif.yaml
- renesas,sci.yaml
- renesas,scif.yaml
- renesas,scifa.yaml
- renesas,scifb.yaml
- rs485.txt
- rs485.yaml
- samsung_uart.yaml
- serial.yaml
- sifive-serial.yaml
- snps-dw-apb-uart.yaml
- socionext,uniphier-uart.yaml
- sprd-uart.yaml
- st,stm32-uart.yaml
- st-asc.txt
- vt8500-uart.txt
- xlnx,opb-uartlite.txt
-
-