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Documentation / devicetree / bindings / sound / wm8903.txt




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Based on kernel version 4.13.3. Page generated on 2017-09-23 13:55 EST.

1	WM8903 audio CODEC
2	
3	This device supports I2C only.
4	
5	Required properties:
6	
7	  - compatible : "wlf,wm8903"
8	
9	  - reg : the I2C address of the device.
10	
11	  - gpio-controller : Indicates this device is a GPIO controller.
12	
13	  - #gpio-cells : Should be two. The first cell is the pin number and the
14	    second cell is used to specify optional parameters (currently unused).
15	
16	Optional properties:
17	
18	  - interrupts : The interrupt line the codec is connected to.
19	
20	  - micdet-cfg : Default register value for R6 (Mic Bias). If absent, the
21	    default is 0.
22	
23	  - micdet-delay : The debounce delay for microphone detection in mS. If
24	    absent, the default is 100.
25	
26	  - gpio-cfg : A list of GPIO configuration register values. The list must
27	    be 5 entries long. If absent, no configuration of these registers is
28	    performed. If any entry has the value 0xffffffff, that GPIO's
29	    configuration will not be modified.
30	
31	  - AVDD-supply : Analog power supply regulator on the AVDD pin.
32	
33	  - CPVDD-supply : Charge pump supply regulator on the CPVDD pin.
34	
35	  - DBVDD-supply : Digital buffer supply regulator for the DBVDD pin.
36	
37	  - DCVDD-supply : Digital core supply regulator for the DCVDD pin.
38	
39	Pins on the device (for linking into audio routes):
40	
41	  * IN1L
42	  * IN1R
43	  * IN2L
44	  * IN2R
45	  * IN3L
46	  * IN3R
47	  * DMICDAT
48	  * HPOUTL
49	  * HPOUTR
50	  * LINEOUTL
51	  * LINEOUTR
52	  * LOP
53	  * LON
54	  * ROP
55	  * RON
56	  * MICBIAS
57	
58	Example:
59	
60	codec: wm8903@1a {
61		compatible = "wlf,wm8903";
62		reg = <0x1a>;
63		interrupts = < 347 >;
64	
65		AVDD-supply = <&fooreg_a>;
66		CPVDD-supply = <&fooreg_b>;
67		DBVDD-supply = <&fooreg_c>;
68		DCVDC-supply = <&fooreg_d>;
69	
70		gpio-controller;
71		#gpio-cells = <2>;
72	
73		micdet-cfg = <0>;
74		micdet-delay = <100>;
75		gpio-cfg = <
76			0x0600 /* DMIC_LR, output */
77			0x0680 /* DMIC_DAT, input */
78			0x0000 /* GPIO, output, low */
79			0x0200 /* Interrupt, output */
80			0x01a0 /* BCLK, input, active high */
81		>;
82	};
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