Based on kernel version 4.13.3. Page generated on 2017-09-23 13:55 EST.
1 SMBus Protocol Summary 2 ====================== 3 4 The following is a summary of the SMBus protocol. It applies to 5 all revisions of the protocol (1.0, 1.1, and 2.0). 6 Certain protocol features which are not supported by 7 this package are briefly described at the end of this document. 8 9 Some adapters understand only the SMBus (System Management Bus) protocol, 10 which is a subset from the I2C protocol. Fortunately, many devices use 11 only the same subset, which makes it possible to put them on an SMBus. 12 13 If you write a driver for some I2C device, please try to use the SMBus 14 commands if at all possible (if the device uses only that subset of the 15 I2C protocol). This makes it possible to use the device driver on both 16 SMBus adapters and I2C adapters (the SMBus command set is automatically 17 translated to I2C on I2C adapters, but plain I2C commands can not be 18 handled at all on most pure SMBus adapters). 19 20 Below is a list of SMBus protocol operations, and the functions executing 21 them. Note that the names used in the SMBus protocol specifications usually 22 don't match these function names. For some of the operations which pass a 23 single data byte, the functions using SMBus protocol operation names execute 24 a different protocol operation entirely. 25 26 Each transaction type corresponds to a functionality flag. Before calling a 27 transaction function, a device driver should always check (just once) for 28 the corresponding functionality flag to ensure that the underlying I2C 29 adapter supports the transaction in question. See 30 <file:Documentation/i2c/functionality> for the details. 31 32 33 Key to symbols 34 ============== 35 36 S (1 bit) : Start bit 37 P (1 bit) : Stop bit 38 Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0. 39 A, NA (1 bit) : Accept and reverse accept bit. 40 Addr (7 bits): I2C 7 bit address. Note that this can be expanded as usual to 41 get a 10 bit I2C address. 42 Comm (8 bits): Command byte, a data byte which often selects a register on 43 the device. 44 Data (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh 45 for 16 bit data. 46 Count (8 bits): A data byte containing the length of a block operation. 47 48 [..]: Data sent by I2C device, as opposed to data sent by the host adapter. 49 50 51 SMBus Quick Command 52 =================== 53 54 This sends a single bit to the device, at the place of the Rd/Wr bit. 55 56 A Addr Rd/Wr [A] P 57 58 Functionality flag: I2C_FUNC_SMBUS_QUICK 59 60 61 SMBus Receive Byte: i2c_smbus_read_byte() 62 ========================================== 63 64 This reads a single byte from a device, without specifying a device 65 register. Some devices are so simple that this interface is enough; for 66 others, it is a shorthand if you want to read the same register as in 67 the previous SMBus command. 68 69 S Addr Rd [A] [Data] NA P 70 71 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE 72 73 74 SMBus Send Byte: i2c_smbus_write_byte() 75 ======================================== 76 77 This operation is the reverse of Receive Byte: it sends a single byte 78 to a device. See Receive Byte for more information. 79 80 S Addr Wr [A] Data [A] P 81 82 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE 83 84 85 SMBus Read Byte: i2c_smbus_read_byte_data() 86 ============================================ 87 88 This reads a single byte from a device, from a designated register. 89 The register is specified through the Comm byte. 90 91 S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P 92 93 Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA 94 95 96 SMBus Read Word: i2c_smbus_read_word_data() 97 ============================================ 98 99 This operation is very like Read Byte; again, data is read from a 100 device, from a designated register that is specified through the Comm 101 byte. But this time, the data is a complete word (16 bits). 102 103 S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P 104 105 Functionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA 106 107 Note the convenience function i2c_smbus_read_word_swapped is 108 available for reads where the two data bytes are the other way 109 around (not SMBus compliant, but very popular.) 110 111 112 SMBus Write Byte: i2c_smbus_write_byte_data() 113 ============================================== 114 115 This writes a single byte to a device, to a designated register. The 116 register is specified through the Comm byte. This is the opposite of 117 the Read Byte operation. 118 119 S Addr Wr [A] Comm [A] Data [A] P 120 121 Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA 122 123 124 SMBus Write Word: i2c_smbus_write_word_data() 125 ============================================== 126 127 This is the opposite of the Read Word operation. 16 bits 128 of data is written to a device, to the designated register that is 129 specified through the Comm byte. 130 131 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P 132 133 Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA 134 135 Note the convenience function i2c_smbus_write_word_swapped is 136 available for writes where the two data bytes are the other way 137 around (not SMBus compliant, but very popular.) 138 139 140 SMBus Process Call: 141 =================== 142 143 This command selects a device register (through the Comm byte), sends 144 16 bits of data to it, and reads 16 bits of data in return. 145 146 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] 147 S Addr Rd [A] [DataLow] A [DataHigh] NA P 148 149 Functionality flag: I2C_FUNC_SMBUS_PROC_CALL 150 151 152 SMBus Block Read: i2c_smbus_read_block_data() 153 ============================================== 154 155 This command reads a block of up to 32 bytes from a device, from a 156 designated register that is specified through the Comm byte. The amount 157 of data is specified by the device in the Count byte. 158 159 S Addr Wr [A] Comm [A] 160 S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P 161 162 Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA 163 164 165 SMBus Block Write: i2c_smbus_write_block_data() 166 ================================================ 167 168 The opposite of the Block Read command, this writes up to 32 bytes to 169 a device, to a designated register that is specified through the 170 Comm byte. The amount of data is specified in the Count byte. 171 172 S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P 173 174 Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 175 176 177 SMBus Block Write - Block Read Process Call 178 =========================================== 179 180 SMBus Block Write - Block Read Process Call was introduced in 181 Revision 2.0 of the specification. 182 183 This command selects a device register (through the Comm byte), sends 184 1 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return. 185 186 S Addr Wr [A] Comm [A] Count [A] Data [A] ... 187 S Addr Rd [A] [Count] A [Data] ... A P 188 189 Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL 190 191 192 SMBus Host Notify 193 ================= 194 195 This command is sent from a SMBus device acting as a master to the 196 SMBus host acting as a slave. 197 It is the same form as Write Word, with the command code replaced by the 198 alerting device's address. 199 200 [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P] 201 202 This is implemented in the following way in the Linux kernel: 203 * I2C bus drivers which support SMBus Host Notify should report 204 I2C_FUNC_SMBUS_HOST_NOTIFY. 205 * I2C bus drivers trigger SMBus Host Notify by a call to 206 i2c_handle_smbus_host_notify(). 207 * I2C drivers for devices which can trigger SMBus Host Notify will have 208 client->irq assigned to a Host Notify IRQ if noone else specified an other. 209 210 There is currently no way to retrieve the data parameter from the client. 211 212 213 Packet Error Checking (PEC) 214 =========================== 215 216 Packet Error Checking was introduced in Revision 1.1 of the specification. 217 218 PEC adds a CRC-8 error-checking byte to transfers using it, immediately 219 before the terminating STOP. 220 221 222 Address Resolution Protocol (ARP) 223 ================================= 224 225 The Address Resolution Protocol was introduced in Revision 2.0 of 226 the specification. It is a higher-layer protocol which uses the 227 messages above. 228 229 ARP adds device enumeration and dynamic address assignment to 230 the protocol. All ARP communications use slave address 0x61 and 231 require PEC checksums. 232 233 234 SMBus Alert 235 =========== 236 237 SMBus Alert was introduced in Revision 1.0 of the specification. 238 239 The SMBus alert protocol allows several SMBus slave devices to share a 240 single interrupt pin on the SMBus master, while still allowing the master 241 to know which slave triggered the interrupt. 242 243 This is implemented the following way in the Linux kernel: 244 * I2C bus drivers which support SMBus alert should call 245 i2c_setup_smbus_alert() to setup SMBus alert support. 246 * I2C drivers for devices which can trigger SMBus alerts should implement 247 the optional alert() callback. 248 249 250 I2C Block Transactions 251 ====================== 252 253 The following I2C block transactions are supported by the 254 SMBus layer and are described here for completeness. 255 They are *NOT* defined by the SMBus specification. 256 257 I2C block transactions do not limit the number of bytes transferred 258 but the SMBus layer places a limit of 32 bytes. 259 260 261 I2C Block Read: i2c_smbus_read_i2c_block_data() 262 ================================================ 263 264 This command reads a block of bytes from a device, from a 265 designated register that is specified through the Comm byte. 266 267 S Addr Wr [A] Comm [A] 268 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P 269 270 Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK 271 272 273 I2C Block Write: i2c_smbus_write_i2c_block_data() 274 ================================================== 275 276 The opposite of the Block Read command, this writes bytes to 277 a device, to a designated register that is specified through the 278 Comm byte. Note that command lengths of 0, 2, or more bytes are 279 supported as they are indistinguishable from data. 280 281 S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P 282 283 Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK