Based on kernel version 4.16.1. Page generated on 2018-04-09 11:53 EST.
1 spi_lm70llp : LM70-LLP parport-to-SPI adapter 2 ============================================== 3 4 Supported board/chip: 5 * National Semiconductor LM70 LLP evaluation board 6 Datasheet: http://www.national.com/pf/LM/LM70.html 7 8 Author: 9 Kaiwan N Billimoria <kaiwan@designergraphix.com> 10 11 Description 12 ----------- 13 This driver provides glue code connecting a National Semiconductor LM70 LLP 14 temperature sensor evaluation board to the kernel's SPI core subsystem. 15 16 This is a SPI master controller driver. It can be used in conjunction with 17 (layered under) the LM70 logical driver (a "SPI protocol driver"). 18 In effect, this driver turns the parallel port interface on the eval board 19 into a SPI bus with a single device, which will be driven by the generic 20 LM70 driver (drivers/hwmon/lm70.c). 21 22 23 Hardware Interfacing 24 -------------------- 25 The schematic for this particular board (the LM70EVAL-LLP) is 26 available (on page 4) here: 27 28 http://www.national.com/appinfo/tempsensors/files/LM70LLPEVALmanual.pdf 29 30 The hardware interfacing on the LM70 LLP eval board is as follows: 31 32 Parallel LM70 LLP 33 Port Direction JP2 Header 34 ----------- --------- ---------------- 35 D0 2 - - 36 D1 3 --> V+ 5 37 D2 4 --> V+ 5 38 D3 5 --> V+ 5 39 D4 6 --> V+ 5 40 D5 7 --> nCS 8 41 D6 8 --> SCLK 3 42 D7 9 --> SI/O 5 43 GND 25 - GND 7 44 Select 13 <-- SI/O 1 45 ----------- --------- ---------------- 46 47 Note that since the LM70 uses a "3-wire" variant of SPI, the SI/SO pin 48 is connected to both pin D7 (as Master Out) and Select (as Master In) 49 using an arrangement that lets either the parport or the LM70 pull the 50 pin low. This can't be shared with true SPI devices, but other 3-wire 51 devices might share the same SI/SO pin. 52 53 The bitbanger routine in this driver (lm70_txrx) is called back from 54 the bound "hwmon/lm70" protocol driver through its sysfs hook, using a 55 spi_write_then_read() call. It performs Mode 0 (SPI/Microwire) bitbanging. 56 The lm70 driver then inteprets the resulting digital temperature value 57 and exports it through sysfs. 58 59 A "gotcha": National Semiconductor's LM70 LLP eval board circuit schematic 60 shows that the SI/O line from the LM70 chip is connected to the base of a 61 transistor Q1 (and also a pullup, and a zener diode to D7); while the 62 collector is tied to VCC. 63 64 Interpreting this circuit, when the LM70 SI/O line is High (or tristate 65 and not grounded by the host via D7), the transistor conducts and switches 66 the collector to zero, which is reflected on pin 13 of the DB25 parport 67 connector. When SI/O is Low (driven by the LM70 or the host) on the other 68 hand, the transistor is cut off and the voltage tied to it's collector is 69 reflected on pin 13 as a High level. 70 71 So: the getmiso inline routine in this driver takes this fact into account, 72 inverting the value read at pin 13. 73 74 75 Thanks to 76 --------- 77 o David Brownell for mentoring the SPI-side driver development. 78 o Dr.Craig Hollabaugh for the (early) "manual" bitbanging driver version. 79 o Nadir Billimoria for help interpreting the circuit schematic.