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Documentation / x86 / x86_64 / 5level-paging.txt


Based on kernel version 4.16.1. Page generated on 2018-04-09 11:53 EST.

1	== Overview ==
2	
3	Original x86-64 was limited by 4-level paing to 256 TiB of virtual address
4	space and 64 TiB of physical address space. We are already bumping into
5	this limit: some vendors offers servers with 64 TiB of memory today.
6	
7	To overcome the limitation upcoming hardware will introduce support for
8	5-level paging. It is a straight-forward extension of the current page
9	table structure adding one more layer of translation.
10	
11	It bumps the limits to 128 PiB of virtual address space and 4 PiB of
12	physical address space. This "ought to be enough for anybody" ©.
13	
14	QEMU 2.9 and later support 5-level paging.
15	
16	Virtual memory layout for 5-level paging is described in
17	Documentation/x86/x86_64/mm.txt
18	
19	== Enabling 5-level paging ==
20	
21	CONFIG_X86_5LEVEL=y enables the feature.
22	
23	So far, a kernel compiled with the option enabled will be able to boot
24	only on machines that supports the feature -- see for 'la57' flag in
25	/proc/cpuinfo.
26	
27	The plan is to implement boot-time switching between 4- and 5-level paging
28	in the future.
29	
30	== User-space and large virtual address space ==
31	
32	On x86, 5-level paging enables 56-bit userspace virtual address space.
33	Not all user space is ready to handle wide addresses. It's known that
34	at least some JIT compilers use higher bits in pointers to encode their
35	information. It collides with valid pointers with 5-level paging and
36	leads to crashes.
37	
38	To mitigate this, we are not going to allocate virtual address space
39	above 47-bit by default.
40	
41	But userspace can ask for allocation from full address space by
42	specifying hint address (with or without MAP_FIXED) above 47-bits.
43	
44	If hint address set above 47-bit, but MAP_FIXED is not specified, we try
45	to look for unmapped area by specified address. If it's already
46	occupied, we look for unmapped area in *full* address space, rather than
47	from 47-bit window.
48	
49	A high hint address would only affect the allocation in question, but not
50	any future mmap()s.
51	
52	Specifying high hint address on older kernel or on machine without 5-level
53	paging support is safe. The hint will be ignored and kernel will fall back
54	to allocation from 47-bit address space.
55	
56	This approach helps to easily make application's memory allocator aware
57	about large address space without manually tracking allocated virtual
58	address space.
59	
60	One important case we need to handle here is interaction with MPX.
61	MPX (without MAWA extension) cannot handle addresses above 47-bit, so we
62	need to make sure that MPX cannot be enabled we already have VMA above
63	the boundary and forbid creating such VMAs once MPX is enabled.
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