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Documentation / devicetree / bindings / ata / ahci-platform.txt




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Based on kernel version 4.0. Page generated on 2015-04-14 21:20 EST.

1	* AHCI SATA Controller
2	
3	SATA nodes are defined to describe on-chip Serial ATA controllers.
4	Each SATA controller should have its own node.
5	
6	It is possible, but not required, to represent each port as a sub-node.
7	It allows to enable each port independently when dealing with multiple
8	PHYs.
9	
10	Required properties:
11	- compatible        : compatible string, one of:
12	  - "allwinner,sun4i-a10-ahci"
13	  - "hisilicon,hisi-ahci"
14	  - "ibm,476gtr-ahci"
15	  - "marvell,armada-380-ahci"
16	  - "snps,dwc-ahci"
17	  - "snps,exynos5440-ahci"
18	  - "snps,spear-ahci"
19	  - "generic-ahci"
20	- interrupts        : <interrupt mapping for SATA IRQ>
21	- reg               : <registers mapping>
22	
23	Please note that when using "generic-ahci" you must also specify a SoC specific
24	compatible:
25		compatible = "manufacturer,soc-model-ahci", "generic-ahci";
26	
27	Optional properties:
28	- dma-coherent      : Present if dma operations are coherent
29	- clocks            : a list of phandle + clock specifier pairs
30	- target-supply     : regulator for SATA target power
31	- phys              : reference to the SATA PHY node
32	- phy-names         : must be "sata-phy"
33	
34	Required properties when using sub-nodes:
35	- #address-cells    : number of cells to encode an address
36	- #size-cells       : number of cells representing the size of an address
37	
38	
39	Sub-nodes required properties:
40	- reg		    : the port number
41	And at least one of the following properties:
42	- phys		    : reference to the SATA PHY node
43	- target-supply    : regulator for SATA target power
44	
45	Examples:
46	        sata@ffe08000 {
47			compatible = "snps,spear-ahci";
48			reg = <0xffe08000 0x1000>;
49			interrupts = <115>;
50	        };
51	
52		ahci: sata@01c18000 {
53			compatible = "allwinner,sun4i-a10-ahci";
54			reg = <0x01c18000 0x1000>;
55			interrupts = <56>;
56			clocks = <&pll6 0>, <&ahb_gates 25>;
57			target-supply = <&reg_ahci_5v>;
58		};
59	
60	With sub-nodes:
61		sata@f7e90000 {
62			compatible = "marvell,berlin2q-achi", "generic-ahci";
63			reg = <0xe90000 0x1000>;
64			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
65			clocks = <&chip CLKID_SATA>;
66			#address-cells = <1>;
67			#size-cells = <0>;
68	
69			sata0: sata-port@0 {
70				reg = <0>;
71				phys = <&sata_phy 0>;
72				target-supply = <&reg_sata0>;
73			};
74	
75			sata1: sata-port@1 {
76				reg = <1>;
77				phys = <&sata_phy 1>;
78				target-supply = <&reg_sata1>;;
79			};
80		};
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