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Documentation / devicetree / bindings / bus / imx-weim.txt




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Based on kernel version 3.15.4. Page generated on 2014-07-07 09:00 EST.

1	Device tree bindings for i.MX Wireless External Interface Module (WEIM)
2	
3	The term "wireless" does not imply that the WEIM is literally an interface
4	without wires. It simply means that this module was originally designed for
5	wireless and mobile applications that use low-power technology.
6	
7	The actual devices are instantiated from the child nodes of a WEIM node.
8	
9	Required properties:
10	
11	 - compatible:		Should contain one of the following:
12				  "fsl,imx1-weim"
13				  "fsl,imx27-weim"
14				  "fsl,imx51-weim"
15				  "fsl,imx50-weim"
16				  "fsl,imx6q-weim"
17	 - reg:			A resource specifier for the register space
18				(see the example below)
19	 - clocks:		the clock, see the example below.
20	 - #address-cells:	Must be set to 2 to allow memory address translation
21	 - #size-cells:		Must be set to 1 to allow CS address passing
22	 - ranges:		Must be set up to reflect the memory layout with four
23				integer values for each chip-select line in use:
24	
25				   <cs-number> 0 <physical address of mapping> <size>
26	
27	Optional properties:
28	
29	 - fsl,weim-cs-gpr:	For "fsl,imx50-weim" and "fsl,imx6q-weim" type of
30				devices, it should be the phandle to the system General
31				Purpose Register controller that contains WEIM CS GPR
32				register, e.g. IOMUXC_GPR1 on i.MX6Q.  IOMUXC_GPR1[11:0]
33				should be set up as one of the following 4 possible
34				values depending on the CS space configuration.
35	
36				IOMUXC_GPR1[11:0]    CS0    CS1    CS2    CS3
37				---------------------------------------------
38					05	    128M     0M     0M     0M
39					033          64M    64M     0M     0M
40					0113         64M    32M    32M     0M
41					01111        32M    32M    32M    32M
42	
43				In case that the property is absent, the reset value or
44				what bootloader sets up in IOMUXC_GPR1[11:0] will be
45				used.
46	
47	Timing property for child nodes. It is mandatory, not optional.
48	
49	 - fsl,weim-cs-timing:	The timing array, contains timing values for the
50				child node. We can get the CS index from the child
51				node's "reg" property. The number of registers depends
52				on the selected chip.
53				For i.MX1, i.MX21 ("fsl,imx1-weim") there are two
54				registers: CSxU, CSxL.
55				For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim")
56				there are three registers: CSCRxU, CSCRxL, CSCRxA.
57				For i.MX50, i.MX53 ("fsl,imx50-weim"),
58				i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim")
59				there are six registers: CSxGCR1, CSxGCR2, CSxRCR1,
60				CSxRCR2, CSxWCR1, CSxWCR2.
61	
62	Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM:
63	
64		weim: weim@021b8000 {
65			compatible = "fsl,imx6q-weim";
66			reg = <0x021b8000 0x4000>;
67			clocks = <&clks 196>;
68			#address-cells = <2>;
69			#size-cells = <1>;
70			ranges = <0 0 0x08000000 0x08000000>;
71			fsl,weim-cs-gpr = <&gpr>;
72	
73			nor@0,0 {
74				compatible = "cfi-flash";
75				reg = <0 0 0x02000000>;
76				#address-cells = <1>;
77				#size-cells = <1>;
78				bank-width = <2>;
79				fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
80						0x0000c000 0x1404a38e 0x00000000>;
81			};
82		};
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